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Merge branch 'master' into v2.1
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Mike Pall committed Jul 12, 2023
2 parents 8fbd576 + aa2db7e commit 8635cba
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Showing 6 changed files with 24 additions and 21 deletions.
7 changes: 6 additions & 1 deletion src/lj_asm.c
Original file line number Diff line number Diff line change
Expand Up @@ -1889,6 +1889,7 @@ static void asm_head_side(ASMState *as)
RegSet allow = RSET_ALL; /* Inverse of all coalesced registers. */
RegSet live = RSET_EMPTY; /* Live parent registers. */
RegSet pallow = RSET_GPR; /* Registers needed by the parent stack check. */
Reg pbase;
IRIns *irp = &as->parent->ir[REF_BASE]; /* Parent base. */
int32_t spadj, spdelta;
int pass2 = 0;
Expand All @@ -1899,7 +1900,11 @@ static void asm_head_side(ASMState *as)
/* Force snap #0 alloc to prevent register overwrite in stack check. */
asm_snap_alloc(as, 0);
}
allow = asm_head_side_base(as, irp, allow);
pbase = asm_head_side_base(as, irp);
if (pbase != RID_NONE) {
rset_clear(allow, pbase);
rset_clear(pallow, pbase);
}

/* Scan all parent SLOADs and collect register dependencies. */
for (i = as->stopins; i > REF_BASE; i--) {
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7 changes: 3 additions & 4 deletions src/lj_asm_arm.h
Original file line number Diff line number Diff line change
Expand Up @@ -2167,24 +2167,23 @@ static void asm_head_root_base(ASMState *as)
}

/* Coalesce BASE register for a side trace. */
static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
static Reg asm_head_side_base(ASMState *as, IRIns *irp)
{
IRIns *ir;
asm_head_lreg(as);
ir = IR(REF_BASE);
if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t)))
ra_spill(as, ir);
if (ra_hasspill(irp->s)) {
rset_clear(allow, ra_dest(as, ir, allow));
return ra_dest(as, ir, RSET_GPR);
} else {
Reg r = irp->r;
lj_assertA(ra_hasreg(r), "base reg lost");
rset_clear(allow, r);
if (r != ir->r && !rset_test(as->freeset, r))
ra_restore(as, regcost_ref(as->cost[r]));
ra_destreg(as, ir, r);
return r;
}
return allow;
}

/* -- Tail of trace ------------------------------------------------------- */
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7 changes: 3 additions & 4 deletions src/lj_asm_arm64.h
Original file line number Diff line number Diff line change
Expand Up @@ -1915,24 +1915,23 @@ static void asm_head_root_base(ASMState *as)
}

/* Coalesce BASE register for a side trace. */
static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
static Reg asm_head_side_base(ASMState *as, IRIns *irp)
{
IRIns *ir;
asm_head_lreg(as);
ir = IR(REF_BASE);
if (ra_hasreg(ir->r) && (rset_test(as->modset, ir->r) || irt_ismarked(ir->t)))
ra_spill(as, ir);
if (ra_hasspill(irp->s)) {
rset_clear(allow, ra_dest(as, ir, allow));
return ra_dest(as, ir, RSET_GPR);
} else {
Reg r = irp->r;
lj_assertA(ra_hasreg(r), "base reg lost");
rset_clear(allow, r);
if (r != ir->r && !rset_test(as->freeset, r))
ra_restore(as, regcost_ref(as->cost[r]));
ra_destreg(as, ir, r);
return r;
}
return allow;
}

/* -- Tail of trace ------------------------------------------------------- */
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8 changes: 4 additions & 4 deletions src/lj_asm_mips.h
Original file line number Diff line number Diff line change
Expand Up @@ -2667,7 +2667,7 @@ static void asm_head_root_base(ASMState *as)
}

/* Coalesce BASE register for a side trace. */
static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
static Reg asm_head_side_base(ASMState *as, IRIns *irp)
{
IRIns *ir = IR(REF_BASE);
Reg r = ir->r;
Expand All @@ -2676,15 +2676,15 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
if (rset_test(as->modset, r) || irt_ismarked(ir->t))
ir->r = RID_INIT; /* No inheritance for modified BASE register. */
if (irp->r == r) {
rset_clear(allow, r); /* Mark same BASE register as coalesced. */
return r; /* Same BASE register already coalesced. */
} else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) {
rset_clear(allow, irp->r);
emit_move(as, r, irp->r); /* Move from coalesced parent reg. */
return irp->r;
} else {
emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */
}
}
return allow;
return RID_NONE;
}

/* -- Tail of trace ------------------------------------------------------- */
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8 changes: 4 additions & 4 deletions src/lj_asm_ppc.h
Original file line number Diff line number Diff line change
Expand Up @@ -2186,7 +2186,7 @@ static void asm_head_root_base(ASMState *as)
}

/* Coalesce BASE register for a side trace. */
static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
static Reg asm_head_side_base(ASMState *as, IRIns *irp)
{
IRIns *ir = IR(REF_BASE);
Reg r = ir->r;
Expand All @@ -2195,15 +2195,15 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
if (rset_test(as->modset, r) || irt_ismarked(ir->t))
ir->r = RID_INIT; /* No inheritance for modified BASE register. */
if (irp->r == r) {
rset_clear(allow, r); /* Mark same BASE register as coalesced. */
return r; /* Same BASE register already coalesced. */
} else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) {
rset_clear(allow, irp->r);
emit_mr(as, r, irp->r); /* Move from coalesced parent reg. */
return irp->r;
} else {
emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */
}
}
return allow;
return RID_NONE;
}

/* -- Tail of trace ------------------------------------------------------- */
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8 changes: 4 additions & 4 deletions src/lj_asm_x86.h
Original file line number Diff line number Diff line change
Expand Up @@ -2877,7 +2877,7 @@ static void asm_head_root_base(ASMState *as)
}

/* Coalesce or reload BASE register for a side trace. */
static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
static Reg asm_head_side_base(ASMState *as, IRIns *irp)
{
IRIns *ir = IR(REF_BASE);
Reg r = ir->r;
Expand All @@ -2886,16 +2886,16 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
if (rset_test(as->modset, r) || irt_ismarked(ir->t))
ir->r = RID_INIT; /* No inheritance for modified BASE register. */
if (irp->r == r) {
rset_clear(allow, r); /* Mark same BASE register as coalesced. */
return r; /* Same BASE register already coalesced. */
} else if (ra_hasreg(irp->r) && rset_test(as->freeset, irp->r)) {
/* Move from coalesced parent reg. */
rset_clear(allow, irp->r);
emit_rr(as, XO_MOV, r|REX_GC64, irp->r);
return irp->r;
} else {
emit_getgl(as, r, jit_base); /* Otherwise reload BASE. */
}
}
return allow;
return RID_NONE;
}

/* -- Tail of trace ------------------------------------------------------- */
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