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Further Optimization for cryptographic routines using RISC-V vector crypto extensions #21923

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Further Optimization for cryptographic routines using RISC-V vector crypto extensions #21923

wants to merge 32 commits into from

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phoebesv
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@phoebesv phoebesv commented Sep 1, 2023 •
edited

This PR do the further optimization for some frequently-used routines based on #20149.
The PR includes optimized cryptographic kernels:

  • AES-128/192/256-GCM
  • AES-128/192/256-ECB
  • AES-128/192/256-CBC
  • AES-128/192/256-CTR
  • AES-128/256-XTS
  • CHACHA20
  • SHA-256
  • SHA-512
  • SM3

To test this PR, a QEMU patchset available on the QEMU mailing list can be utilized. We have conducted testing of this PR with the qemu patchset.

@openssl-machine openssl-machine added the hold: cla required The contributor needs to submit a license agreement label Sep 1, 2023
@t8m t8m added branch: master Merge to master branch triaged: feature The issue/pr requests/adds a feature approval: review pending This pull request needs review by a committer approval: otc review pending This pull request needs review by an OTC member labels Sep 1, 2023
@github-actions github-actions bot added the severity: fips change The pull request changes FIPS provider sources label Sep 1, 2023
@JerryShih
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ci failed message:

Can't locate Switch.pm in @INC (you may need to install the Switch module) (@INC contains: /home/runner/work/openssl/openssl/crypto/aes/asm/../../perlasm /home/runner/work/openssl/openssl/crypto/aes/asm /etc/perl /usr/local/lib/x86_64-linux-gnu/perl/5.34.0 /usr/local/share/perl/5.34.0 /usr/lib/x86_64-linux-gnu/perl5/5.34 /usr/share/perl5 /usr/lib/x86_64-linux-gnu/perl-base /usr/lib/x86_64-linux-gnu/perl/5.34 /usr/share/perl/5.34 /usr/local/lib/site_perl) at /home/runner/work/openssl/openssl/crypto/aes/asm/../../perlasm/riscv.pm line 40.

Please add libswitch-perl at https://github.com/phoebesv/openssl/blob/d60023c10b94acea71f7206699bc2ea63af10162/.github/workflows/cross-compiles.yml#L105 for perl switch.

@phoebesv phoebesv force-pushed the riscv-crypto-opt branch 4 times, most recently from 882358c to 5102409 Compare September 15, 2023 04:52
@openssl-machine openssl-machine removed the hold: cla required The contributor needs to submit a license agreement label Sep 15, 2023
@phoebesv
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ci failed message:

Can't locate Switch.pm in @INC (you may need to install the Switch module) (@INC contains: /home/runner/work/openssl/openssl/crypto/aes/asm/../../perlasm /home/runner/work/openssl/openssl/crypto/aes/asm /etc/perl /usr/local/lib/x86_64-linux-gnu/perl/5.34.0 /usr/local/share/perl/5.34.0 /usr/lib/x86_64-linux-gnu/perl5/5.34 /usr/share/perl5 /usr/lib/x86_64-linux-gnu/perl-base /usr/lib/x86_64-linux-gnu/perl/5.34 /usr/share/perl/5.34 /usr/local/lib/site_perl) at /home/runner/work/openssl/openssl/crypto/aes/asm/../../perlasm/riscv.pm line 40.

Please add libswitch-perl at https://github.com/phoebesv/openssl/blob/d60023c10b94acea71f7206699bc2ea63af10162/.github/workflows/cross-compiles.yml#L105 for perl switch.

It has been resolved by using if instead of switch in the riscv perl module, so we no longer require libswitch-perl.

@paulidale paulidale added tests: present The PR has suitable tests present and removed approval: otc review pending This pull request needs review by an OTC member labels Sep 20, 2023
@paulidale
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Note: I'm not conversant in RISC-V assembler and particularly not the various extensions. That part is not reviewed and we'd appreciate someone who is knowledgeable in these areas to provide an external review.

@phoebesv phoebesv force-pushed the riscv-crypto-opt branch 2 times, most recently from 43c5b0d to 5e381cf Compare September 25, 2023 10:03
@phoebesv
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This PR has been tested by the following commands:

  • AES-GCM testing command:
    OPENSSL_riscvcap=rv64gc_v_zvbb_zvkg_zvkned /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvbb=true,x-zvkg=true,x-zvkned=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpciph_aes_common.txt

  • AES-ECB testing command:
    OPENSSL_riscvcap=rv64gc_v_zvkned /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvkned=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpciph_aes_common.txt

  • AES-CBC testing command:
    OPENSSL_riscvcap=rv64gc_v_zvkned /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvkned=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpciph_aes_common.txt

  • AES-CTR testing command:
    OPENSSL_riscvcap=rv64gc_v_zvbb_zvkned /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvbb=true,x-zvkned=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpciph_aes_common.txt

  • AES-XTS testing command:
    OPENSSL_riscvcap=rv64gc_v_zvbb_zvkg_zvkned /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvbb=true,x-zvkg=true,x-zvkned=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpciph_aes_common.txt

  • SHA-256 testing command:
    OPENSSL_riscvcap=rv64gc_v_zvbb_zvknha /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvbb=true,x-zvknha=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpmd_sha.txt

  • SHA-512 testing command:
    OPENSSL_riscvcap=rv64gc_v_zvbb_zvknhb /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvbb=true,x-zvknhb=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpmd_sha.txt

  • CHACHA20 testing command:
    OPENSSL_riscvcap=rv64gc_v_zvbb /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvbb=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpciph_chacha.txt

  • SM3 testing command:
    OPENSSL_riscvcap=rv64gc_v_zvbb_zvksh /path/to/qemu-riscv64 -cpu rv64,g=true,f=true,d=true,v=true,vlen=128,elen=64,vext_spec=v1.0,x-zvbb=true,x-zvksh=true,rvv_ma_all_1s=true,rvv_ta_all_1s=true ./test/evp_test ./test/recipes/30-test_evp_data/evpmac_sm3.txt

bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 22, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}
6883f94 
Add implementations of AES-ECB, AES-CBC, AES-CTR, and AES-XTS, as well
as bare (single-block) AES, using the RISC-V vector crypto extensions.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using regular .S files
instead of the so-called perlasm, using the assembler instead of bare
'.inst', greatly reducing code duplication, supporting AES-192, and
making the code use the same AES key structure as the C code.

Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 22, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated ChaCha20
0dffa85 
Add an implementation of ChaCha20 using the Zvkb extension.  The
assembly code is derived from OpenSSL code (openssl/openssl#21923) that
was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using a regular .S file
instead of the so-called perlasm, using the assembler instead of bare
'.inst', and reducing code duplication.

Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 22, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated GHASH
f3abf75 
Add an implementation of GHASH using the zvkg extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', reducing code
duplication, and eliminating unnecessary endianness conversions.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 22, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated SHA-{256,224}
531909f 
Add an implementation of SHA-256 and SHA-224 using the Zvknha or Zvknhb
extension.  The assembly code is derived from OpenSSL code
(openssl/openssl#21923) that was dual-licensed so that it could be
reused in the kernel.  Nevertheless, the assembly has been significantly
reworked for integration with the kernel, for example by using a regular
.S file instead of the so-called perlasm, using the assembler instead of
bare '.inst', and greatly reducing code duplication.

Co-developed-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 22, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated SHA-{512,384}
a593c3b 
Add an implementation of SHA-512 and SHA-384 using the Zvknhb extension.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using a regular .S file
instead of the so-called perlasm, using the assembler instead of bare
'.inst', and greatly reducing code duplication.

Co-developed-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 22, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated SM3
a3baf57 
Add an implementation of SM3 using the Zvksh extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', and greatly
reducing code duplication.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 22, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated SM4
edbb4bb 
Add an implementation of SM4 using the Zvksed extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', and greatly
reducing code duplication.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih @palmer-dabbelt
crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}
eb24af5 
Add implementations of AES-ECB, AES-CBC, AES-CTR, and AES-XTS, as well
as bare (single-block) AES, using the RISC-V vector crypto extensions.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using regular .S files
instead of the so-called perlasm, using the assembler instead of bare
'.inst', greatly reducing code duplication, supporting AES-192, and
making the code use the same AES key structure as the C code.

Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-5-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih @palmer-dabbelt
crypto: riscv - add vector crypto accelerated ChaCha20
bb54668 
Add an implementation of ChaCha20 using the Zvkb extension.  The
assembly code is derived from OpenSSL code (openssl/openssl#21923) that
was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using a regular .S file
instead of the so-called perlasm, using the assembler instead of bare
'.inst', and reducing code duplication.

Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-6-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih @palmer-dabbelt
crypto: riscv - add vector crypto accelerated GHASH
600a385 
Add an implementation of GHASH using the zvkg extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', reducing code
duplication, and eliminating unnecessary endianness conversions.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-7-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih @palmer-dabbelt
crypto: riscv - add vector crypto accelerated SHA-{256,224}
8c8e404 
Add an implementation of SHA-256 and SHA-224 using the Zvknha or Zvknhb
extension.  The assembly code is derived from OpenSSL code
(openssl/openssl#21923) that was dual-licensed so that it could be
reused in the kernel.  Nevertheless, the assembly has been significantly
reworked for integration with the kernel, for example by using a regular
.S file instead of the so-called perlasm, using the assembler instead of
bare '.inst', and greatly reducing code duplication.

Co-developed-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-8-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih @palmer-dabbelt
crypto: riscv - add vector crypto accelerated SHA-{512,384}
b341592 
Add an implementation of SHA-512 and SHA-384 using the Zvknhb extension.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using a regular .S file
instead of the so-called perlasm, using the assembler instead of bare
'.inst', and greatly reducing code duplication.

Co-developed-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-9-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih @palmer-dabbelt
crypto: riscv - add vector crypto accelerated SM3
563a525 
Add an implementation of SM3 using the Zvksh extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', and greatly
reducing code duplication.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-10-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih @palmer-dabbelt
crypto: riscv - add vector crypto accelerated SM4
b8d0635 
Add an implementation of SM4 using the Zvksed extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', and greatly
reducing code duplication.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-11-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@palmer-dabbelt
Merge patch series "RISC-V crypto with reworked asm files"
67daf84 
Eric Biggers <ebiggers@kernel.org> says:

This patchset, which applies to v6.8-rc1, adds cryptographic algorithm
implementations accelerated using the RISC-V vector crypto extensions
(https://github.com/riscv/riscv-crypto/releases/download/v1.0.0/riscv-crypto-spec-vector.pdf)
and RISC-V vector extension
(https://github.com/riscv/riscv-v-spec/releases/download/v1.0/riscv-v-spec-1.0.pdf).
The following algorithms are included: AES in ECB, CBC, CTR, and XTS modes;
ChaCha20; GHASH; SHA-2; SM3; and SM4.

In general, the assembly code requires a 64-bit RISC-V CPU with VLEN >= 128,
little endian byte order, and vector unaligned access support.  The ECB, CTR,
XTS, and ChaCha20 code is designed to naturally scale up to larger VLEN values.
Building the assembly code requires tip-of-tree binutils (future 2.42) or
tip-of-tree clang (future 18.x).  All algorithms pass testing in QEMU, using
CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y.  Much of the assembly code is derived from
OpenSSL code that was added by openssl/openssl#21923.
It's been cleaned up for integration with the kernel, e.g. reducing code
duplication, eliminating use of .inst and perlasm, and fixing a few bugs.

This patchset incorporates the work of multiple people, including Jerry Shih,
Heiko Stuebner, Christoph Müllner, Phoebe Chen, Charalampos Mitrodimas, and
myself.  This patchset went through several versions from Heiko (last version
https://lore.kernel.org/linux-crypto/20230711153743.1970625-1-heiko@sntech.de),
then several versions from Jerry (last version:
https://lore.kernel.org/linux-crypto/20231231152743.6304-1-jerry.shih@sifive.com),
then finally several versions from me.  Thanks to everyone who has contributed
to this patchset or its prerequisites.

* b4-shazam-merge:
  crypto: riscv - add vector crypto accelerated SM4
  crypto: riscv - add vector crypto accelerated SM3
  crypto: riscv - add vector crypto accelerated SHA-{512,384}
  crypto: riscv - add vector crypto accelerated SHA-{256,224}
  crypto: riscv - add vector crypto accelerated GHASH
  crypto: riscv - add vector crypto accelerated ChaCha20
  crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}
  RISC-V: hook new crypto subdir into build-system
  RISC-V: add TOOLCHAIN_HAS_VECTOR_CRYPTO
  RISC-V: add helper function to read the vector VLEN

Link: https://lore.kernel.org/r/20240122002024.27477-1-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}
0eb240d 
Add implementations of AES-ECB, AES-CBC, AES-CTR, and AES-XTS, as well
as bare (single-block) AES, using the RISC-V vector crypto extensions.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using regular .S files
instead of the so-called perlasm, using the assembler instead of bare
'.inst', greatly reducing code duplication, supporting AES-192, and
making the code use the same AES key structure as the C code.

Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated ChaCha20
a04e2a8 
Add an implementation of ChaCha20 using the Zvkb extension.  The
assembly code is derived from OpenSSL code (openssl/openssl#21923) that
was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using a regular .S file
instead of the so-called perlasm, using the assembler instead of bare
'.inst', and reducing code duplication.

Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated GHASH
3e02c53 
Add an implementation of GHASH using the zvkg extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', reducing code
duplication, and eliminating unnecessary endianness conversions.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated SHA-{256,224}
b46428d 
Add an implementation of SHA-256 and SHA-224 using the Zvknha or Zvknhb
extension.  The assembly code is derived from OpenSSL code
(openssl/openssl#21923) that was dual-licensed so that it could be
reused in the kernel.  Nevertheless, the assembly has been significantly
reworked for integration with the kernel, for example by using a regular
.S file instead of the so-called perlasm, using the assembler instead of
bare '.inst', and greatly reducing code duplication.

Co-developed-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated SHA-{512,384}
add474c 
Add an implementation of SHA-512 and SHA-384 using the Zvknhb extension.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using a regular .S file
instead of the so-called perlasm, using the assembler instead of bare
'.inst', and greatly reducing code duplication.

Co-developed-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated SM3
eb4fcd4 
Add an implementation of SM3 using the Zvksh extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', and greatly
reducing code duplication.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
bjoto pushed a commit to linux-riscv/linux-riscv that referenced this pull request Jan 23, 2024
@JerryShih
crypto: riscv - add vector crypto accelerated SM4
bf1ad48 
Add an implementation of SM4 using the Zvksed extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', and greatly
reducing code duplication.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
@cyyself cyyself mentioned this pull request Apr 9, 2024
Closed
hubot pushed a commit to aosp-mirror/kernel_common that referenced this pull request Apr 10, 2024
@JerryShih
UPSTREAM: crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,…
aa0ca52 
…CTR,XTS}

Add implementations of AES-ECB, AES-CBC, AES-CTR, and AES-XTS, as well
as bare (single-block) AES, using the RISC-V vector crypto extensions.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using regular .S files
instead of the so-called perlasm, using the assembler instead of bare
'.inst', greatly reducing code duplication, supporting AES-192, and
making the code use the same AES key structure as the C code.

Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-5-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

(cherry picked from commit eb24af5)
Bug: 332317531
Test: For whole topic: booted kernel in QEMU and ran crypto self-tests
Change-Id: Iba6fee37575cc077fc85f08b134fcf32ee2628df
Signed-off-by: Eric Biggers <ebiggers@google.com>
hubot pushed a commit to aosp-mirror/kernel_common that referenced this pull request Apr 10, 2024
@JerryShih
UPSTREAM: crypto: riscv - add vector crypto accelerated ChaCha20
eaef475 
Add an implementation of ChaCha20 using the Zvkb extension.  The
assembly code is derived from OpenSSL code (openssl/openssl#21923) that
was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using a regular .S file
instead of the so-called perlasm, using the assembler instead of bare
'.inst', and reducing code duplication.

Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-6-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

(cherry picked from commit bb54668)
Bug: 332317531
Test: For whole topic: booted kernel in QEMU and ran crypto self-tests
Change-Id: Ie685b346306cb71d4fc4116aca423771bc0e1cde
Signed-off-by: Eric Biggers <ebiggers@google.com>
hubot pushed a commit to aosp-mirror/kernel_common that referenced this pull request Apr 10, 2024
@JerryShih
UPSTREAM: crypto: riscv - add vector crypto accelerated GHASH
a2a7ebf 
Add an implementation of GHASH using the zvkg extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', reducing code
duplication, and eliminating unnecessary endianness conversions.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-7-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

(cherry picked from commit 600a385)
Bug: 332317531
Test: For whole topic: booted kernel in QEMU and ran crypto self-tests
Change-Id: Ica2b79b666b9e3600d94d7101be1e4b43b6ee77c
Signed-off-by: Eric Biggers <ebiggers@google.com>
hubot pushed a commit to aosp-mirror/kernel_common that referenced this pull request Apr 10, 2024
@JerryShih
UPSTREAM: crypto: riscv - add vector crypto accelerated SHA-{256,224}
0aa4a59 
Add an implementation of SHA-256 and SHA-224 using the Zvknha or Zvknhb
extension.  The assembly code is derived from OpenSSL code
(openssl/openssl#21923) that was dual-licensed so that it could be
reused in the kernel.  Nevertheless, the assembly has been significantly
reworked for integration with the kernel, for example by using a regular
.S file instead of the so-called perlasm, using the assembler instead of
bare '.inst', and greatly reducing code duplication.

Co-developed-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-8-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

(cherry picked from commit 8c8e404)
Bug: 332317531
Test: For whole topic: booted kernel in QEMU and ran crypto self-tests
Change-Id: I4461882b9465df9e15b6232292603df6b9e99c12
Signed-off-by: Eric Biggers <ebiggers@google.com>
hubot pushed a commit to aosp-mirror/kernel_common that referenced this pull request Apr 10, 2024
@JerryShih
UPSTREAM: crypto: riscv - add vector crypto accelerated SHA-{512,384}
db08176 
Add an implementation of SHA-512 and SHA-384 using the Zvknhb extension.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using a regular .S file
instead of the so-called perlasm, using the assembler instead of bare
'.inst', and greatly reducing code duplication.

Co-developed-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-9-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

(cherry picked from commit b341592)
Bug: 332317531
Test: For whole topic: booted kernel in QEMU and ran crypto self-tests
Change-Id: I337ca6b6a956ea454126c7d95d27b53f8eec1de3
Signed-off-by: Eric Biggers <ebiggers@google.com>
hubot pushed a commit to aosp-mirror/kernel_common that referenced this pull request Apr 10, 2024
@JerryShih
UPSTREAM: crypto: riscv - add vector crypto accelerated SM3
1f17ffb 
Add an implementation of SM3 using the Zvksh extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', and greatly
reducing code duplication.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-10-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

(cherry picked from commit 563a525)
Bug: 332317531
Test: For whole topic: booted kernel in QEMU and ran crypto self-tests
Change-Id: Ie6b5cc3e84551b44807e6b962f398c23b7500edf
Signed-off-by: Eric Biggers <ebiggers@google.com>
hubot pushed a commit to aosp-mirror/kernel_common that referenced this pull request Apr 10, 2024
@JerryShih
UPSTREAM: crypto: riscv - add vector crypto accelerated SM4
c44ad97 
Add an implementation of SM4 using the Zvksed extension.  The assembly
code is derived from OpenSSL code (openssl/openssl#21923) that was
dual-licensed so that it could be reused in the kernel.  Nevertheless,
the assembly has been significantly reworked for integration with the
kernel, for example by using a regular .S file instead of the so-called
perlasm, using the assembler instead of bare '.inst', and greatly
reducing code duplication.

Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Co-developed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-11-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

(cherry picked from commit b8d0635)
Bug: 332317531
Test: For whole topic: booted kernel in QEMU and ran crypto self-tests
Change-Id: I017d4382d7a270abe1b7313b6aed493c9e8050aa
Signed-off-by: Eric Biggers <ebiggers@google.com>
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