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Fix the issue #24114 #24278
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Fix the issue #24114 #24278
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You implemented JIT emitter: good start, thanks! I would like to suggest next implementation steps.
Let me know if you still have any questions. |
@@ -309,6 +309,27 @@ class jit_select_emitter : public jit_emitter { | |||
void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const; | |||
}; | |||
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class jit_softsign_emitter : public jit_emitter { |
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please rename: jit_softsign_emitter
=> jit_soft_sign_emitter
TReg aux = TReg(aux_vec_idxs[0]); | ||
h->movi(aux.s, 1); | ||
h->fdiv(dst.s, src.s, aux.s); | ||
h->fadd(dst.s, dst.s, src.s); | ||
h->fdiv(dst.s, dst.s, aux.s); | ||
h->fsub(dst.s, aux.s, dst.s); | ||
h->fmul(dst.s, dst.s, src.s); |
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- can you align implementation with OpenVINO SoftSign operation from here: https://docs.openvino.ai/2022.3/openvino_docs_ops_activation_SoftSign_9.html
- you don't need auxiliary register here
…into aryan_softsign
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// SoftPlus | ||
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jit_softplus_emitter::jit_softplus_emitter(dnnl::impl::cpu::aarch64::jit_generator *host, |
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Move here: #24109, please
class jit_soft_sign_emitter : public jit_emitter { | ||
jit_soft_sign_emitter(dnnl::impl::cpu::aarch64::jit_generator *host, | ||
dnnl::impl::cpu::aarch64::cpu_isa_t host_isa, | ||
const ov::element::Type exec_prc = ov::element::f32); | ||
jit_soft_sign_emitter(dnnl::impl::cpu::aarch64::jit_generator *host, | ||
dnnl::impl::cpu::aarch64::cpu_isa_t host_isa, | ||
const std::shared_ptr<ov::Node>& node); | ||
size_t get_inputs_count() const override; | ||
size_t get_aux_vecs_count() const override; | ||
static std::set<std::vector<element::Type>> get_supported_precisions(const std::shared_ptr<ov::Node>& node = nullptr); | ||
private: | ||
void emit_impl(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const override; | ||
template <dnnl::impl::cpu::aarch64::cpu_isa_t isa> | ||
void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const; | ||
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}; |
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fix alignment, please
@eshoguli I think this is working fine but the problem is a test case does not respond? |
h->movi(aux.s, 1); | ||
h->fdiv(dst.s, src.s, 1); | ||
h->fadd(dst.s, dst.s, src.s); | ||
h->fdiv(dst.s, dst.s, 1); | ||
h->fsub(dst.s, 1, dst.s); | ||
h->fmul(dst.s, dst.s, src.s); |
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Please fix, SoftSign
implementation: https://docs.openvino.ai/2022.3/openvino_docs_ops_activation_SoftSign_9.html
y = x
x = abs(x)
x = x + 1
y = y / x
@@ -896,6 +896,50 @@ void jit_select_emitter::emit_isa(const std::vector<size_t> &in_vec_idxs, const | |||
h->mov(dst.b16, aux.b16); | |||
} | |||
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// SoftSign | |||
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jit_softsign_emitter::jit_softsign_emitter(dnnl::impl::cpu::aarch64::jit_generator *host, |
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jit_softsign_emitter
=> jit_soft_sign_emitter
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Comments about implementation: you can find SoftSign
explanation here: https://docs.openvino.ai/2024/documentation/openvino-ir-format/operation-sets/operation-specs/activation/softsign-9.html.
It's simple:
tmp = x
x = abs(x)
x = x + 1
y = tmp / x
Note, please, source and destination register can be the same.
TReg src = TReg(in_vec_idxs[0]); | ||
TReg dst = TReg(out_vec_idxs[0]); | ||
TReg aux = TReg(aux_vec_idxs[0]); | ||
h->fabs(src.s, src.s); |
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You are losing the original input value here, which has to used for the last step: x / (...)
. You should use auxiliary register to store the abs(x)
result value, not destination register.
h->fcvtns(dst.d, src.s); | ||
h->fld1(dst.d, dst.d); |
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- you don't need it here
- operate with
word
(float32
) values
h->fcvtns(dst.d, src.s); | ||
h->fld1(dst.d, dst.d); | ||
h->fadd(dst.d, dst.d, src.d); | ||
h->flog(dst.d, dst.d); |
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don't need it here
h->fadd(dst.d, dst.d, src.d); | ||
h->flog(dst.d, dst.d); | ||
h->fdiv(dst.d, dst.d, v2.d); | ||
h->fmuls(src.s, dst.s, src.s); |
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don't need it here
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@eshoguli please provide more detail
hey @Aryan8912 will you have a time to finish this PR? |
This PR will be closed in a week because of 2 weeks of no activity. |
close: #24114
Details:
Tickets: