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Fix the issue #24114 #24278

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@Aryan8912 Aryan8912 commented Apr 28, 2024

@Aryan8912 Aryan8912 requested review from a team as code owners April 28, 2024 03:07
@github-actions github-actions bot added the category: CPU OpenVINO CPU plugin label Apr 28, 2024
@sys-openvino-ci sys-openvino-ci added the ExternalPR External contributor label Apr 28, 2024
@ilya-lavrenov ilya-lavrenov added the platform: arm OpenVINO on ARM / ARM64 label Apr 28, 2024
@eshoguli
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You implemented JIT emitter: good start, thanks!

I would like to suggest next implementation steps.

  1. Update tests to be sure that your implementation is used. Tests should fail: acl_f32 primitive is used.
  2. Update JIT kernel. Tests should fail: expected and reference tensors comparation fails.
  3. Finish JIT emitter. Tests should pass.

Let me know if you still have any questions.

@@ -309,6 +309,27 @@ class jit_select_emitter : public jit_emitter {
void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const;
};

class jit_softsign_emitter : public jit_emitter {
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please rename: jit_softsign_emitter => jit_soft_sign_emitter

Comment on lines 795 to 801
TReg aux = TReg(aux_vec_idxs[0]);
h->movi(aux.s, 1);
h->fdiv(dst.s, src.s, aux.s);
h->fadd(dst.s, dst.s, src.s);
h->fdiv(dst.s, dst.s, aux.s);
h->fsub(dst.s, aux.s, dst.s);
h->fmul(dst.s, dst.s, src.s);
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  1. can you align implementation with OpenVINO SoftSign operation from here: https://docs.openvino.ai/2022.3/openvino_docs_ops_activation_SoftSign_9.html
  2. you don't need auxiliary register here

@dmitry-gorokhov dmitry-gorokhov added this to the 2024.2 milestone May 6, 2024

// SoftPlus

jit_softplus_emitter::jit_softplus_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
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Move here: #24109, please

Comment on lines 360 to 375
class jit_soft_sign_emitter : public jit_emitter {
jit_soft_sign_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
const ov::element::Type exec_prc = ov::element::f32);
jit_soft_sign_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
const std::shared_ptr<ov::Node>& node);
size_t get_inputs_count() const override;
size_t get_aux_vecs_count() const override;
static std::set<std::vector<element::Type>> get_supported_precisions(const std::shared_ptr<ov::Node>& node = nullptr);
private:
void emit_impl(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const override;
template <dnnl::impl::cpu::aarch64::cpu_isa_t isa>
void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const;

};
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fix alignment, please

@Aryan8912
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@eshoguli I think this is working fine but the problem is a test case does not respond?

Comment on lines 933 to 938
h->movi(aux.s, 1);
h->fdiv(dst.s, src.s, 1);
h->fadd(dst.s, dst.s, src.s);
h->fdiv(dst.s, dst.s, 1);
h->fsub(dst.s, 1, dst.s);
h->fmul(dst.s, dst.s, src.s);
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Please fix, SoftSign implementation: https://docs.openvino.ai/2022.3/openvino_docs_ops_activation_SoftSign_9.html

y = x
x = abs(x)
x = x + 1
y = y / x

@@ -896,6 +896,50 @@ void jit_select_emitter::emit_isa(const std::vector<size_t> &in_vec_idxs, const
h->mov(dst.b16, aux.b16);
}

// SoftSign

jit_softsign_emitter::jit_softsign_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
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jit_softsign_emitter => jit_soft_sign_emitter

@dmitry-gorokhov dmitry-gorokhov removed this from the 2024.2 milestone May 23, 2024
@dmitry-gorokhov dmitry-gorokhov added this to the 2024.3 milestone May 23, 2024
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Comments about implementation: you can find SoftSign explanation here: https://docs.openvino.ai/2024/documentation/openvino-ir-format/operation-sets/operation-specs/activation/softsign-9.html.

It's simple:

tmp = x
x = abs(x)
x = x + 1
y = tmp / x

Note, please, source and destination register can be the same.

TReg src = TReg(in_vec_idxs[0]);
TReg dst = TReg(out_vec_idxs[0]);
TReg aux = TReg(aux_vec_idxs[0]);
h->fabs(src.s, src.s);
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You are losing the original input value here, which has to used for the last step: x / (...). You should use auxiliary register to store the abs(x) result value, not destination register.

Comment on lines +934 to +935
h->fcvtns(dst.d, src.s);
h->fld1(dst.d, dst.d);
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@eshoguli eshoguli May 24, 2024

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  1. you don't need it here
  2. operate with word (float32) values

h->fcvtns(dst.d, src.s);
h->fld1(dst.d, dst.d);
h->fadd(dst.d, dst.d, src.d);
h->flog(dst.d, dst.d);
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don't need it here

h->fadd(dst.d, dst.d, src.d);
h->flog(dst.d, dst.d);
h->fdiv(dst.d, dst.d, v2.d);
h->fmuls(src.s, dst.s, src.s);
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don't need it here

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@eshoguli please provide more detail

@mlukasze
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hey @Aryan8912 will you have a time to finish this PR?

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github-actions bot commented Jul 3, 2024

This PR will be closed in a week because of 2 weeks of no activity.

@github-actions github-actions bot added the Stale label Jul 3, 2024
@mg-intel mg-intel removed the Stale label Jul 3, 2024
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[Good First Issue] [ARM]: Implement CPU plugin just-in-time emitter for SoftSign operation
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