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32-bit General Enhanced RISC-V MCU

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Overview

The CH32V103 is a general purpose microcontroller based on the 32-bit RISC processor RISC-V3A. The CH32V103 provides clock security system, multi-level power management and general DMA controller. The CH32V103 is also equipped with abundant peripheral resources, such as single USB2.0 host/device interface, multi-channel 12-bit ADC module, multi-channel TouchKey, multiple timers, and multi-channel IIC/USART/SPI interfaces, etc.

System Block Diagram

frame

Features

  • RISC-V3A processor, max 80MHz system clock frequency;
  • Single-cycle multiplication and hardware division;
  • 20KB SRAM,64KB CodeFlash;
  • 2.7V to 5.5V supply voltage, supplies to GPIO simultaneously;
  • Multiple low-power modes: sleep/stop/standby;
  • Power-on/power-down reset (POR/PDR);
  • Programmable voltage detector (PVD);
  • 7-channel DMA controller;
  • 16-channel TouchKey detection;
  • 16-channel 12-bit ADC;
  • 7 timers;
  • One USB2.0 host/device interface (full-speed and low-speed);
  • Two I2C interfaces (support SMBus/PMBus);
  • 3 USARTs;
  • 2 SPIs (Master mode and Slave mode);
  • 51 I/O ports, all I/O ports can be mapped to 16 external interrupts;
  • CRC calculation unit, 96-bit unique chip ID;
  • Serial 2—wire debug interface (SDI);
  • Packages: LQFP64M, LQFP48, QFN48. debug interface;
  • Packages: LQFP64M, LQFP100.

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