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core: fix checkpatch errors
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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@nbd168
nbd168 committed Sep 5, 2016
1 parent 9390780 commit b18d66f
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Showing 8 changed files with 47 additions and 36 deletions.
3 changes: 2 additions & 1 deletion debugfs.c
View file
Expand Up @@ -64,7 +64,8 @@ struct dentry *mt76_register_debugfs(struct mt76_dev *dev)
return NULL;

debugfs_create_u32("regidx", S_IRUSR | S_IWUSR, dir, &dev->debugfs_reg);
debugfs_create_file("regval", S_IRUSR | S_IWUSR, dir, dev, &fops_regval);
debugfs_create_file("regval", S_IRUSR | S_IWUSR, dir, dev,
&fops_regval);
debugfs_create_blob("eeprom", S_IRUSR, dir, &dev->eeprom);
if (dev->otp.data)
debugfs_create_blob("otp", S_IRUSR, dir, &dev->otp);
Expand Down
34 changes: 19 additions & 15 deletions dma.c
View file
Expand Up @@ -82,10 +82,10 @@ mt76_dma_add_buf(struct mt76_dev *dev, struct mt76_queue *q,

desc = &q->desc[idx];

ACCESS_ONCE(desc->buf0) = cpu_to_le32(buf0);
ACCESS_ONCE(desc->buf1) = cpu_to_le32(buf1);
ACCESS_ONCE(desc->info) = cpu_to_le32(info);
ACCESS_ONCE(desc->ctrl) = cpu_to_le32(ctrl);
WRITE_ONCE(desc->buf0, cpu_to_le32(buf0));
WRITE_ONCE(desc->buf1, cpu_to_le32(buf1));
WRITE_ONCE(desc->info, cpu_to_le32(info));
WRITE_ONCE(desc->ctrl, cpu_to_le32(ctrl));

q->queued++;
}
Expand All @@ -101,25 +101,27 @@ mt76_dma_tx_cleanup_idx(struct mt76_dev *dev, struct mt76_queue *q, int idx,
struct mt76_queue_entry *prev_e)
{
struct mt76_queue_entry *e = &q->entry[idx];
__le32 __ctrl = ACCESS_ONCE(q->desc[idx].ctrl);
__le32 __ctrl = READ_ONCE(q->desc[idx].ctrl);
u32 ctrl = le32_to_cpu(__ctrl);

if (!e->txwi || !e->skb) {
__le32 addr = ACCESS_ONCE(q->desc[idx].buf0);
__le32 addr = READ_ONCE(q->desc[idx].buf0);
u32 len = FIELD_GET(MT_DMA_CTL_SD_LEN0, ctrl);

dma_unmap_single(dev->dev, le32_to_cpu(addr), len,
DMA_TO_DEVICE);
}

if (!(ctrl & MT_DMA_CTL_LAST_SEC0)) {
__le32 addr = ACCESS_ONCE(q->desc[idx].buf1);
__le32 addr = READ_ONCE(q->desc[idx].buf1);
u32 len = FIELD_GET(MT_DMA_CTL_SD_LEN1, ctrl);

dma_unmap_single(dev->dev, le32_to_cpu(addr), len,
DMA_TO_DEVICE);
}

if (e->txwi == DMA_DUMMY_TXWI)
e->txwi = NULL;
e->txwi = NULL;

*prev_e = *e;
memset(e, 0, sizeof(*e));
Expand All @@ -128,7 +130,8 @@ mt76_dma_tx_cleanup_idx(struct mt76_dev *dev, struct mt76_queue *q, int idx,
static void
mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q)
{
q->tail = q->head = ioread32(&q->regs->dma_idx);
q->head = ioread32(&q->regs->dma_idx);
q->tail = q->head;
iowrite32(q->head, &q->regs->cpu_idx);
}

Expand Down Expand Up @@ -166,7 +169,7 @@ mt76_dma_tx_cleanup(struct mt76_dev *dev, enum mt76_txq_id qid, bool flush)
q->queued--;

if (!flush && q->tail == last)
last = ioread32(&q->regs->dma_idx);
last = ioread32(&q->regs->dma_idx);
}

if (!flush)
Expand All @@ -191,9 +194,9 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx,
void *buf = e->buf;
int buf_len = SKB_WITH_OVERHEAD(q->buf_size);

buf_addr = ACCESS_ONCE(desc->buf0);
buf_addr = READ_ONCE(desc->buf0);
if (len) {
u32 ctl = ACCESS_ONCE(desc->ctrl);
u32 ctl = READ_ONCE(desc->ctrl);
*len = FIELD_GET(MT_DMA_CTL_SD_LEN0, ctl);
*more = !(ctl & MT_DMA_CTL_LAST_SEC0);
}
Expand Down Expand Up @@ -310,7 +313,7 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)

static void
mt76_add_fragment(struct mt76_dev *dev, struct mt76_queue *q, void *data,
int len, bool more)
int len, bool more)
{
struct page *page = virt_to_head_page(data);
int offset = data - page_address(page);
Expand Down Expand Up @@ -361,7 +364,7 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget)
}

if (q == &dev->q_rx[MT_RXQ_MCU]) {
u32 * rxfce = (u32 *) skb->cb;
u32 *rxfce = (u32 *) skb->cb;
*rxfce = info;
}

Expand Down Expand Up @@ -407,7 +410,8 @@ mt76_dma_init(struct mt76_dev *dev)
init_dummy_netdev(&dev->napi_dev);

for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++) {
netif_napi_add(&dev->napi_dev, &dev->napi[i], mt76_dma_rx_poll, 64);
netif_napi_add(&dev->napi_dev, &dev->napi[i], mt76_dma_rx_poll,
64);
mt76_dma_rx_fill(dev, &dev->q_rx[i], false);
skb_queue_head_init(&dev->rx_skb[i]);
napi_enable(&dev->napi[i]);
Expand Down
7 changes: 3 additions & 4 deletions eeprom.c
View file
Expand Up @@ -102,11 +102,10 @@ mt76_eeprom_override(struct mt76_dev *dev)

if (!is_valid_ether_addr(dev->macaddr)) {
eth_random_addr(dev->macaddr);
dev_printk(KERN_INFO, dev->dev,
"Invalid MAC address, using random address %pM\n",
dev->macaddr);
dev_info(dev->dev,
"Invalid MAC address, using random address %pM\n",
dev->macaddr);
}

}
EXPORT_SYMBOL_GPL(mt76_eeprom_override);

Expand Down
10 changes: 5 additions & 5 deletions mac80211.c
View file
Expand Up @@ -120,7 +120,7 @@ mt76_init_sband(struct mt76_dev *dev, struct mt76_sband *msband,
ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_4;

if (!vht)
return 0;
return 0;

vht_cap = &sband->vht_cap;
vht_cap->vht_supported = true;
Expand All @@ -137,9 +137,9 @@ mt76_init_sband(struct mt76_dev *dev, struct mt76_sband *msband,
vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC |
IEEE80211_VHT_CAP_TXSTBC |
IEEE80211_VHT_CAP_RXSTBC_1 |
IEEE80211_VHT_CAP_SHORT_GI_80;
IEEE80211_VHT_CAP_TXSTBC |
IEEE80211_VHT_CAP_RXSTBC_1 |
IEEE80211_VHT_CAP_SHORT_GI_80;

return 0;
}
Expand Down Expand Up @@ -267,7 +267,7 @@ void mt76_set_channel(struct mt76_dev *dev)
EXPORT_SYMBOL_GPL(mt76_set_channel);

int mt76_get_survey(struct ieee80211_hw *hw, int idx,
struct survey_info *survey)
struct survey_info *survey)
{
struct mt76_dev *dev = hw->priv;
struct mt76_sband *sband;
Expand Down
3 changes: 2 additions & 1 deletion mmio.c
View file
Expand Up @@ -40,7 +40,8 @@ static u32 mt76_mmio_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val)
return val;
}

static void mt76_mmio_copy(struct mt76_dev *dev, u32 offset, const void *data, int len)
static void mt76_mmio_copy(struct mt76_dev *dev, u32 offset, const void *data,
int len)
{
__iowrite32_copy(dev->regs + offset, data, len >> 2);
}
Expand Down
13 changes: 8 additions & 5 deletions mt76.h
View file
Expand Up @@ -35,7 +35,8 @@ struct mt76_bus_ops {
u32 (*rr)(struct mt76_dev *dev, u32 offset);
void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
void (*copy)(struct mt76_dev *dev, u32 offset, const void *data, int len);
void (*copy)(struct mt76_dev *dev, u32 offset, const void *data,
int len);
};

enum mt76_txq_id {
Expand Down Expand Up @@ -114,7 +115,8 @@ struct mt76_queue_ops {

void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);

void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid, bool flush);
void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid,
bool flush);

void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
};
Expand Down Expand Up @@ -170,7 +172,7 @@ struct mt76_driver_ops {
struct ieee80211_sta *sta, u32 *tx_info);

void (*tx_complete_skb)(struct mt76_dev *dev, struct mt76_queue *q,
struct mt76_queue_entry *e, bool flush);
struct mt76_queue_entry *e, bool flush);

void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q,
struct sk_buff *skb);
Expand Down Expand Up @@ -259,7 +261,7 @@ struct mt76_rate_power {
#define mt76_hw(dev) (dev)->mt76.hw

bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
int timeout);
int timeout);

#define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__)

Expand Down Expand Up @@ -318,6 +320,7 @@ static inline struct ieee80211_txq *
mtxq_to_txq(struct mt76_txq *mtxq)
{
void *ptr = mtxq;

return container_of(ptr, struct ieee80211_txq, drv_priv);
}

Expand All @@ -342,7 +345,7 @@ void mt76_release_buffered_frames(struct ieee80211_hw *hw,
bool more_data);
void mt76_set_channel(struct mt76_dev *dev);
int mt76_get_survey(struct ieee80211_hw *hw, int idx,
struct survey_info *survey);
struct survey_info *survey);

/* internal */
void mt76_tx_free(struct mt76_dev *dev);
Expand Down
11 changes: 7 additions & 4 deletions tx.c
View file
Expand Up @@ -28,7 +28,8 @@ mt76_alloc_txwi(struct mt76_dev *dev)
if (!t)
return NULL;

addr = dma_map_single(dev->dev, &t->txwi, sizeof(t->txwi), DMA_TO_DEVICE);
addr = dma_map_single(dev->dev, &t->txwi, sizeof(t->txwi),
DMA_TO_DEVICE);
t->dma_addr = addr;

return t;
Expand Down Expand Up @@ -135,7 +136,8 @@ int mt76_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
if (n == ARRAY_SIZE(buf))
goto unmap;

addr = dma_map_single(dev->dev, iter->data, iter->len, DMA_TO_DEVICE);
addr = dma_map_single(dev->dev, iter->data, iter->len,
DMA_TO_DEVICE);
if (dma_mapping_error(dev->dev, addr))
goto unmap;

Expand All @@ -151,7 +153,8 @@ int mt76_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
unmap:
ret = -ENOMEM;
for (n--; n > 0; n--)
dma_unmap_single(dev->dev, buf[n].addr, buf[n].len, DMA_TO_DEVICE);
dma_unmap_single(dev->dev, buf[n].addr, buf[n].len,
DMA_TO_DEVICE);

free:
e.skb = skb;
Expand Down Expand Up @@ -454,7 +457,7 @@ void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
spin_lock_bh(&mtxq->hwq->lock);
mtxq->send_bar = mtxq->aggr && send_bar;
if (!list_empty(&mtxq->list))
list_del_init(&mtxq->list);
list_del_init(&mtxq->list);
spin_unlock_bh(&mtxq->hwq->lock);
}
}
Expand Down
2 changes: 1 addition & 1 deletion util.c
View file
Expand Up @@ -46,7 +46,7 @@ bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
if (cur == val)
return true;

msleep(10);
usleep_range(10000, 20000);
} while (timeout-- > 0);

return false;
Expand Down

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