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generic: backport initial LEDs hw control support
Backport initial LEDs hw control support. Currently this is limited to only rx/tx and link events for the netdev trigger but the API got accepted and the additional modes are working on and will be backported later. Refresh every patch and add the additional config flag for QCA8K new LEDs support. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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...generic/backport-5.15/814-v6.3-leds-Move-led_init_default_state_get-to-the-global-h.patch
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From 156a5bb89ca6f3edd2be0bfd0de15e575442927e Mon Sep 17 00:00:00 2001 | ||
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> | ||
Date: Tue, 3 Jan 2023 15:12:47 +0200 | ||
Subject: [PATCH] leds: Move led_init_default_state_get() to the global header | ||
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||
There are users inside and outside LED framework that have implemented | ||
a local copy of led_init_default_state_get(). In order to deduplicate | ||
that, as the first step move the declaration from LED header to the | ||
global one. | ||
|
||
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> | ||
Signed-off-by: Lee Jones <lee@kernel.org> | ||
Link: https://lore.kernel.org/r/20230103131256.33894-3-andriy.shevchenko@linux.intel.com | ||
--- | ||
drivers/leds/leds.h | 1 - | ||
include/linux/leds.h | 2 ++ | ||
2 files changed, 2 insertions(+), 1 deletion(-) | ||
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--- a/drivers/leds/leds.h | ||
+++ b/drivers/leds/leds.h | ||
@@ -27,7 +27,6 @@ ssize_t led_trigger_read(struct file *fi | ||
ssize_t led_trigger_write(struct file *filp, struct kobject *kobj, | ||
struct bin_attribute *bin_attr, char *buf, | ||
loff_t pos, size_t count); | ||
-enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode); | ||
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extern struct rw_semaphore leds_list_lock; | ||
extern struct list_head leds_list; | ||
--- a/include/linux/leds.h | ||
+++ b/include/linux/leds.h | ||
@@ -63,6 +63,8 @@ struct led_init_data { | ||
bool devname_mandatory; | ||
}; | ||
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+enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode); | ||
+ | ||
struct led_hw_trigger_type { | ||
int dummy; | ||
}; |
67 changes: 67 additions & 0 deletions
67
...ux/generic/backport-5.15/815-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch
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From 3e8b4d6277fd19d98c817576954dd6a4ff3caa2b Mon Sep 17 00:00:00 2001 | ||
From: Christian Marangi <ansuelsmth@gmail.com> | ||
Date: Mon, 17 Apr 2023 17:17:23 +0200 | ||
Subject: [PATCH 1/9] net: dsa: qca8k: move qca8k_port_to_phy() to header | ||
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Move qca8k_port_to_phy() to qca8k header as it's useful for future | ||
reference in Switch LEDs module since the same logic is applied to get | ||
the right index of the switch port. | ||
Make it inline as it's simple function that just decrease the port. | ||
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> | ||
Reviewed-by: Andrew Lunn <andrew@lunn.ch> | ||
Reviewed-by: Michal Kubiak <michal.kubiak@intel.com> | ||
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> | ||
Signed-off-by: David S. Miller <davem@davemloft.net> | ||
--- | ||
drivers/net/dsa/qca/qca8k-8xxx.c | 15 --------------- | ||
drivers/net/dsa/qca/qca8k.h | 14 ++++++++++++++ | ||
2 files changed, 14 insertions(+), 15 deletions(-) | ||
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--- a/drivers/net/dsa/qca/qca8k-8xxx.c | ||
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c | ||
@@ -716,21 +716,6 @@ err_clear_skb: | ||
return ret; | ||
} | ||
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-static u32 | ||
-qca8k_port_to_phy(int port) | ||
-{ | ||
- /* From Andrew Lunn: | ||
- * Port 0 has no internal phy. | ||
- * Port 1 has an internal PHY at MDIO address 0. | ||
- * Port 2 has an internal PHY at MDIO address 1. | ||
- * ... | ||
- * Port 5 has an internal PHY at MDIO address 4. | ||
- * Port 6 has no internal PHY. | ||
- */ | ||
- | ||
- return port - 1; | ||
-} | ||
- | ||
static int | ||
qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask) | ||
{ | ||
--- a/drivers/net/dsa/qca/qca8k.h | ||
+++ b/drivers/net/dsa/qca/qca8k.h | ||
@@ -414,6 +414,20 @@ struct qca8k_fdb { | ||
u8 mac[6]; | ||
}; | ||
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+static inline u32 qca8k_port_to_phy(int port) | ||
+{ | ||
+ /* From Andrew Lunn: | ||
+ * Port 0 has no internal phy. | ||
+ * Port 1 has an internal PHY at MDIO address 0. | ||
+ * Port 2 has an internal PHY at MDIO address 1. | ||
+ * ... | ||
+ * Port 5 has an internal PHY at MDIO address 4. | ||
+ * Port 6 has no internal PHY. | ||
+ */ | ||
+ | ||
+ return port - 1; | ||
+} | ||
+ | ||
/* Common setup function */ | ||
extern const struct qca8k_mib_desc ar8327_mib[]; | ||
extern const struct regmap_access_table qca8k_readable_table; |
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