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lantiq: add basic support for AVM FRITZ!Box 7490 #2738
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/dts-v1/; | ||
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#include "vr9.dtsi" | ||
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#include <dt-bindings/input/input.h> | ||
#include <dt-bindings/mips/lantiq_rcu_gphy.h> | ||
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/ { | ||
compatible = "avm,fritz7490", "lantiq,xway", "lantiq,vr9"; | ||
model = "AVM FRITZ!Box 7490"; | ||
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chosen { | ||
bootargs = "console=ttyLTQ0,115200"; | ||
}; | ||
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aliases { | ||
led-boot = &led_power; | ||
led-failsafe = &led_info_red; | ||
led-running = &led_power; | ||
led-upgrade = &led_info_red; | ||
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led-dsl = &led_internet; | ||
led-wifi = &led_wlan; | ||
}; | ||
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memory@0 { | ||
device_type = "memory"; | ||
reg = <0x0 0x10000000>; | ||
}; | ||
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keys { | ||
compatible = "gpio-keys-polled"; | ||
poll-interval = <100>; | ||
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dect { | ||
label = "dect"; | ||
gpios = <&gpio 1 GPIO_ACTIVE_LOW>; | ||
linux,code = <KEY_PHONE>; | ||
}; | ||
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wlan { | ||
label = "wlan"; | ||
gpios = <&gpio 29 GPIO_ACTIVE_LOW>; | ||
linux,code = <KEY_RFKILL>; | ||
}; | ||
}; | ||
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leds { | ||
compatible = "gpio-leds"; | ||
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led_power: power { | ||
label = "fritz7490:green:power"; | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Drop model name from LED label |
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gpios = <&gpio 45 GPIO_ACTIVE_LOW>; | ||
default-state = "keep"; | ||
}; | ||
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led_internet: internet { | ||
label = "fritz7490:green:internet"; | ||
gpios = <&gpio 47 GPIO_ACTIVE_LOW>; | ||
}; | ||
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led_fixedline { | ||
label = "fritz7490:green:fixedline"; | ||
gpios = <&gpio 36 GPIO_ACTIVE_LOW>; | ||
}; | ||
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led_wlan: wlan { | ||
label = "fritz7490:green:wlan"; | ||
gpios = <&gpio 35 GPIO_ACTIVE_LOW>; | ||
}; | ||
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led_info_green { | ||
label = "fritz7490:green:info"; | ||
gpios = <&gpio 33 GPIO_ACTIVE_LOW>; | ||
}; | ||
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led_info_red: info_red { | ||
label = "fritz7490:red:info"; | ||
gpios = <&gpio 46 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
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gpio-export { | ||
compatible = "gpio-export"; | ||
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gpio_wasp_reset { | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Please remove this as long as wsap is not working. |
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gpio-export,name = "fritz7490:wasp:reset"; | ||
gpio-export,output = <1>; | ||
gpios = <&gpio 34 GPIO_ACTIVE_LOW>; | ||
}; | ||
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gpio_wasp_wakeup { | ||
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gpio-export,name = "fritz7490:wasp:wakeup"; | ||
gpio-export,output = <2>; | ||
gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; | ||
}; | ||
}; | ||
}; | ||
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ð0 { | ||
interface@0 { | ||
compatible = "lantiq,xrx200-pdi"; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
reg = <0>; | ||
lantiq,switch; | ||
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ethernet@0 { | ||
compatible = "lantiq,xrx200-pdi-port"; | ||
reg = <0>; | ||
phy-mode = "sgmii"; | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Wiki Page says it have AR8035 and this PHY support RGMII |
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phy-handle = <&phy0>; | ||
gpios = <&gpio 32 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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ethernet@1 { | ||
compatible = "lantiq,xrx200-pdi-port"; | ||
reg = <1>; | ||
phy-mode = "sgmii"; | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Same as above |
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phy-handle = <&phy1>; | ||
gpios = <&gpio 44 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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ethernet@2 { | ||
compatible = "lantiq,xrx200-pdi-port"; | ||
reg = <2>; | ||
phy-mode = "gmii"; | ||
phy-handle = <&phy11>; | ||
}; | ||
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ethernet@4 { | ||
compatible = "lantiq,xrx200-pdi-port"; | ||
reg = <4>; | ||
phy-mode = "gmii"; | ||
phy-handle = <&phy13>; | ||
}; | ||
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ethernet@5 { | ||
compatible = "lantiq,xrx200-pdi-port"; | ||
reg = <5>; | ||
phy-mode = "rgmii"; | ||
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fixed-link { | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. The xrx200 driver does not support fixed links unless you add a patch. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. yes, do you mean this one?: andyboeh@9eeecc7#diff-53548cba5fb20e52886933f9e46e869e Then the question needs tobe resolved how do we register this port in the userspace domain, I can imagine we need to label it as "wan" but I am not sure of the implications... ucidef_add_switch "switch0" There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Hmmm and.. possibly they hooked up the Xilinx to port 3 maybe. If this is true this could open up some interesting possibilities... an onboard programmable FPGA on the network ... :) There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Yes, I meant this commit. Without it, the lines regarding There is an ongoing discussion on the labeling of this port in the 3390 PR. My point of view is that it should bear a "lan" label, because the WiFi Access Point is connected to it. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I would agree. (I was under the wrong impression that fixed link meant the DSL soc...) There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. No, it means that the kernel fakes a PHY and an MDIO bus at the given port with the given speed / settings. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. please remove this till it is really supported. |
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speed = <1000>; | ||
full-duplex; | ||
}; | ||
}; | ||
}; | ||
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mdio { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
compatible = "lantiq,xrx200-mdio"; | ||
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phy0: ethernet-phy@0 { | ||
reg = <0x0>; | ||
compatible = "ethernet-phy-ieee802.3-c22"; | ||
}; | ||
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phy1: ethernet-phy@1 { | ||
reg = <0x1>; | ||
compatible = "ethernet-phy-ieee802.3-c22"; | ||
}; | ||
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phy11: ethernet-phy@11 { | ||
reg = <0x11>; | ||
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; | ||
}; | ||
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phy13: ethernet-phy@13 { | ||
reg = <0x13>; | ||
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; | ||
}; | ||
}; | ||
}; | ||
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&gphy0 { | ||
lantiq,gphy-mode = <GPHY_MODE_GE>; | ||
}; | ||
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&gphy1 { | ||
lantiq,gphy-mode = <GPHY_MODE_GE>; | ||
}; | ||
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&gpio { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&state_default>; | ||
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state_default: pinmux { | ||
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phy-rst { | ||
lantiq,pins = "io32", "io44"; | ||
lantiq,pull = <0>; | ||
lantiq,open-drain; | ||
lantiq,output = <1>; | ||
}; | ||
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pcie-rst { | ||
lantiq,pins = "io21"; | ||
lantiq,open-drain; | ||
lantiq,output = <1>; | ||
}; | ||
}; | ||
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pcie-rst-dev { | ||
gpio-hog; | ||
line-name = "pcie-rst-dev"; | ||
gpios = <22 GPIO_ACTIVE_LOW>; | ||
output-low; | ||
}; | ||
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usb-vbus { | ||
gpio-hog; | ||
line-name = "usb-vbus"; | ||
gpios = <14 GPIO_ACTIVE_HIGH>; | ||
output-low; | ||
}; | ||
}; | ||
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&spi { | ||
status = "okay"; | ||
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flash@4 { | ||
compatible = "jedec,spi-nor"; | ||
reg = <4>; | ||
spi-max-frequency = <33250000>; | ||
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partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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partition@0 { | ||
reg = <0x0 0x40000>; | ||
label = "urlader"; | ||
read-only; | ||
}; | ||
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partition@40000 { | ||
reg = <0x40000 0x60000>; | ||
label = "tffs (1)"; | ||
read-only; | ||
}; | ||
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partition@a0000 { | ||
reg = <0xa0000 0x60000>; | ||
label = "tffs (2)"; | ||
read-only; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&localbus { | ||
flash@1 { | ||
compatible = "lantiq,nand-xway"; | ||
bank-width = <1>; | ||
reg = <1 0x0 0x2000000>; | ||
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nand-ecc-mode = "on-die"; | ||
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partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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partition@0 { | ||
label = "kernel"; | ||
reg = <0x0 0x400000>; | ||
}; | ||
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partition@400000 { | ||
label = "ubi"; | ||
reg = <0x400000 0x1fc00000>; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&pcie0 { | ||
status = "okay"; | ||
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gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>; | ||
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}; |
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Add Missing SPDX License identifier