Merge pull request #47 from optimsoc/rework_na

Rework NA: Further replace old flit with flit and last

src/soc/hw/noc/buffer.core

@@ -2,6 +2,8 @@ CAPI=1
 [main]
 name = optimsoc:noc:buffer
 description = "NoC Buffer"
+depend =
+  optimsoc:base:config
 
 [fileset src_files]
 file_type = systemVerilogSource

src/soc/hw/noc/demux.core

@@ -2,7 +2,9 @@ CAPI=1
 [main]
 name = optimsoc:noc:demux
 description = "NoC Demux"
-depend = optimsoc:base:constants
+depend =
+  optimsoc:base:constants
+  optimsoc:base:config
 
 [fileset src_files]
 file_type = systemVerilogSource

src/soc/hw/noc/mux.core

@@ -2,6 +2,8 @@ CAPI=1
 [main]
 name = optimsoc:noc:mux
 description = "NoC Mux"
+depend =
+  optimsoc:base:config
 
 [fileset src_files]
 file_type = systemVerilogSource

src/soc/hw/noc/verilog/noc_buffer.sv

@@ -26,27 +26,31 @@
  *   Stefan Wallentowitz <stefan@wallentowitz.de>
  */
 
+import optimsoc::*;
+
 module noc_buffer
-  #(parameter FLIT_WIDTH = 34,
+  #(parameter config_t CONFIG = 'x,
     parameter DEPTH = 16)    
    (
-    input 		    clk,
-    input 		    rst,
+    input 				clk,
+    input 				rst,
 
     // FIFO input side
-    input [FLIT_WIDTH-1:0]  in_flit,
-    input 		    in_valid,
-    output 		    in_ready,
+    input [CONFIG.NOC_DATA_WIDTH-1:0] 	in_flit,
+    input 				in_last,
+    input 				in_valid,
+    output 				in_ready,
 
     //FIFO output side
-    output [FLIT_WIDTH-1:0] out_flit,
-    output 		    out_valid,
-    input 		    out_ready
+    output [CONFIG.NOC_DATA_WIDTH-1:0] out_flit,
+    output 				out_last,
+    output 				out_valid,
+    input 				out_ready
     );
 
    // Signals for fifo
-   reg [FLIT_WIDTH-1:0] fifo_data [0:DEPTH-1]; //actual fifo
-   reg [FLIT_WIDTH-1:0] nxt_fifo_data [0:DEPTH-1];
+   reg [CONFIG.NOC_DATA_WIDTH:0] fifo_data [0:DEPTH-1]; //actual fifo
+   reg [CONFIG.NOC_DATA_WIDTH:0] nxt_fifo_data [0:DEPTH-1];
 
    reg [DEPTH:0]         fifo_write_ptr;
 
@@ -56,7 +60,8 @@ module noc_buffer
    assign pop = out_valid & out_ready;
    assign push = in_valid & in_ready;
 
-   assign out_flit = fifo_data[0];
+   assign out_flit = fifo_data[0][CONFIG.NOC_DATA_WIDTH-1:0];
+   assign out_last = fifo_data[0][CONFIG.NOC_DATA_WIDTH];
    assign out_valid = !fifo_write_ptr[0];
 
    assign in_ready = !fifo_write_ptr[DEPTH];
@@ -76,14 +81,14 @@ module noc_buffer
       for (i=0;i<DEPTH;i=i+1) begin
          if (pop) begin
             if (push & fifo_write_ptr[i+1]) begin
-               nxt_fifo_data[i] = in_flit;
+               nxt_fifo_data[i] = {in_last, in_flit};
             end else if (i<DEPTH-1) begin
                nxt_fifo_data[i] = fifo_data[i+1];
             end else begin
                nxt_fifo_data[i] = fifo_data[i];
             end
          end else if (push & fifo_write_ptr[i]) begin
-            nxt_fifo_data[i] = in_flit;
+            nxt_fifo_data[i] = {in_last, in_flit};
          end else begin
             nxt_fifo_data[i] = fifo_data[i];
          end

src/soc/hw/noc/verilog/noc_demux.sv

@@ -26,34 +26,34 @@
  *   Stefan Wallentowitz <stefan@wallentowitz.de>
  */
 
+import optimsoc::*;
 import constants::*;
 
 module noc_demux
   #(
-    parameter FLIT_DATA_WIDTH = 32,
-    parameter FLIT_TYPE_WIDTH = 34,
+    parameter config_t CONFIG = 'x,
     parameter CHANNELS = 2,
     parameter [63:0] MAPPING = 'x
     )
    (
-    input                                 clk, rst,
+    input 					      clk, rst,
 
-    input [FLIT_WIDTH-1:0]                in_flit,
-    input                                 in_valid,
-    output reg                            in_ready,
+    input [CONFIG.NOC_DATA_WIDTH-1:0] 		      in_flit,
+    input 					      in_last,
+    input 					      in_valid,
+    output reg 					      in_ready,
 
-    output [CHANNELS-1:0][FLIT_WIDTH-1:0] out_flit,
-    output reg [CHANNELS-1:0]             out_valid,
-    input [CHANNELS-1:0]                  out_ready
+    output [CHANNELS-1:0][CONFIG.NOC_DATA_WIDTH-1:0] out_flit,
+    output [CHANNELS-1:0] 			      out_last,
+    output reg [CHANNELS-1:0] 			      out_valid,
+    input [CHANNELS-1:0] 			      out_ready
     );
 
-   localparam FLIT_WIDTH = FLIT_DATA_WIDTH + FLIT_TYPE_WIDTH;
+   reg [CHANNELS-1:0] 				      active;
+   reg [CHANNELS-1:0] 				      nxt_active;
 
-   reg [CHANNELS-1:0]                         active;
-   reg [CHANNELS-1:0]                         nxt_active;
-
-   wire [2:0]                                 packet_class;
-   reg [CHANNELS-1:0]                         select;
+   wire [2:0] 					      packet_class;
+   reg [CHANNELS-1:0] 				      select;
 
    assign packet_class = in_flit[NOC_CLASS_MSB:NOC_CLASS_LSB];
 
@@ -65,6 +65,7 @@ module noc_demux
    end
 
    assign out_flit = {CHANNELS{in_flit}};
+   assign out_last = {CHANNELS{in_last}};
 
    always @(*) begin
       nxt_active = active;
@@ -74,16 +75,16 @@ module noc_demux
 
       if (active == 0) begin
          in_ready = select & out_ready;
-         out_valid = select & {CHANNELS{in_valid}};	 
-	 
-         if (in_valid & ~in_flit[FLIT_DATA_WIDTH]) begin
-	    nxt_active = select;
+         out_valid = select & {CHANNELS{in_valid}};
+
+         if (in_valid & ~in_last) begin
+            nxt_active = select;
          end
       end else begin
          in_ready = active & out_ready;
          out_valid = active & {CHANNELS{in_valid}};
 
-         if (in_valid & in_flit[FLIT_DATA_WIDTH]) begin
+         if (in_valid & in_last) begin
             nxt_active = 0;
          end
       end

src/soc/hw/noc/verilog/noc_mux.sv

@@ -27,40 +27,43 @@
  *   Andreas Lankes <andreas.lankes@tum.de>
  */
 
+import optimsoc::*;
 
 module noc_mux
   #(
-    parameter FLIT_DATA_WIDTH = 32,
-    parameter FLIT_TYPE_WIDTH = 34,
-    parameter CHANNELS = 2
+    parameter config_t CONFIG = 'x,
+    parameter CHANNELS        = 2
     )
    (
-    input 				 clk, rst,
+    input 					    clk, rst,
 
-    input [CHANNELS-1:0][FLIT_WIDTH-1:0] in_flit,
-    input [CHANNELS-1:0] 		 in_valid,
-    output reg [CHANNELS-1:0] 		 in_ready,
+    input [CHANNELS-1:0][CONFIG.NOC_DATA_WIDTH-1:0] in_flit,
+    input [CHANNELS-1:0] 			    in_last,
+    input [CHANNELS-1:0] 			    in_valid,
+    output reg [CHANNELS-1:0] 			    in_ready,
 
-    output reg [FLIT_WIDTH-1:0] 	 out_flit,
-    output reg 				 out_valid,
-    input 				 out_ready
+    output reg [CONFIG.NOC_DATA_WIDTH-1:0] 	    out_flit,
+    output reg 					    out_last,
+    output reg 					    out_valid,
+    input 					    out_ready
     );
 
-   localparam FLIT_WIDTH = FLIT_DATA_WIDTH + FLIT_TYPE_WIDTH;
+   wire [CHANNELS-1:0] 				     select;
+   reg [CHANNELS-1:0] 				     active;
 
-   wire [CHANNELS-1:0] 			 select;
-   reg [CHANNELS-1:0] 			 active;
-
-   reg 					 activeroute, nxt_activeroute;
+   reg 						     activeroute, nxt_activeroute;
 
-   wire [CHANNELS-1:0] 			 req_masked;
+   wire [CHANNELS-1:0] 				     req_masked;
    assign req_masked = {CHANNELS{~activeroute & out_ready}} & in_valid;
 
    always @(*) begin
-      out_flit = {FLIT_WIDTH{1'bz}};
+      out_flit = {CONFIG.NOC_DATA_WIDTH{1'b0}};
+      out_last = 1'b0;
       for (int c = 0; c < CHANNELS; c = c + 1) begin
-	 if (select[c])
-	   out_flit = in_flit[c];
+         if (select[c]) begin
+            out_flit = in_flit[c];
+	    out_last = in_last[c];
+	 end
       end
    end		 
 
@@ -72,7 +75,7 @@ module noc_mux
          if (|(in_valid & active) && out_ready) begin
             in_ready = active;
             out_valid = 1;
-            if (out_flit[FLIT_DATA_WIDTH])
+            if (out_last)
               nxt_activeroute = 0;
          end else begin
             out_valid = 1'b0;
@@ -82,7 +85,7 @@ module noc_mux
          out_valid = 0;
          if (|in_valid) begin
             out_valid = 1'b1;
-            nxt_activeroute = ~out_flit[FLIT_DATA_WIDTH];
+            nxt_activeroute = ~out_last;
             in_ready = select & {CHANNELS{out_ready}};
          end
       end

src/soc/sw/baremetal-libs/src/libbaremetal/include/optimsoc-baremetal.h

@@ -555,8 +555,9 @@ extern dma_success_t dma_wait(dma_transfer_handle_t id);
  * invoke the handler, but you can register different handlers for different
  * message classes.
  *
- * \note{Be careful with selecting classes, because they may be occupied by
- * other hardware. If you are not sure, use class 0.}
+ * \note
+ * Be careful with selecting classes, because they may be occupied by other
+ * hardware. If you are not sure, use class 0.
  *
  * \ingroup libbaremetal
  * @{
@@ -581,7 +582,7 @@ uint16_t optimsoc_mp_simple_num_endpoints(void);
  * Hence you need to check the endpoint from the remote using
  * optimsoc_mp_simple_enable() before calling optimsoc_mp_simple_send().
  *
- * @param endpoint Endpoint buffer to enable
+ * \param endpoint Endpoint buffer to enable
  */
 void optimsoc_mp_simple_enable(uint16_t endpoint);