arm64: allwinner: h616: dts: fix overlays

arch/arm64/boot/dts/allwinner/overlay/Makefile

@@ -46,12 +46,18 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
 	sun50i-h6-uart1.dtbo \
 	sun50i-h6-uart2.dtbo \
 	sun50i-h6-uart3.dtbo \
-	sun50i-h6-w1-gpio.dtbo
+	sun50i-h6-w1-gpio.dtbo \
+	sun50i-h616-uart2.dtbo \
+	sun50i-h616-uart5.dtbo \
+	sun50i-h616-i2c3.dtbo \
+	sun50i-h616-i2c4.dtbo \
+	sun50i-h616-spi-spidev.dtbo
 
 scr-$(CONFIG_ARCH_SUNXI) += \
 	sun50i-a64-fixup.scr \
 	sun50i-h5-fixup.scr \
-	sun50i-h6-fixup.scr
+	sun50i-h6-fixup.scr \
+	sun50i-h616-fixup.scr
 
 dtbotxt-$(CONFIG_ARCH_SUNXI) += \
 	README.sun50i-a64-overlays \

arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd

@@ -0,0 +1,110 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
+
+# setexpr test_var ${tmp_bank} - A
+# works only for hex numbers (A-F)
+
+setenv decompose_pin 'setexpr tmp_bank sub "P(C|G|H|I)\\d+" "\\1";
+setexpr tmp_pin sub "P\\S(\\d+)" "\\1";
+test "${tmp_bank}" = "C" && setenv tmp_bank 2;
+test "${tmp_bank}" = "G" && setenv tmp_bank 6'
+test "${tmp_bank}" = "H" && setenv tmp_bank 7;
+test "${tmp_bank}" = "I" && setenv tmp_bank 8;
+
+if test -n "${param_spinor_spi_bus}"; then
+	test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000"
+	test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000"
+	fdt set /soc/${tmp_spi_path} status "okay"
+	fdt set /soc/${tmp_spi_path}/spiflash@0 status "okay"
+	if test -n "${param_spinor_max_freq}"; then
+		fdt set /soc/${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>"
+	fi
+	if test "${param_spinor_spi_cs}" = "1"; then
+		fdt set /soc/${tmp_spi_path}/spiflash@0 reg "<1>"
+	fi
+	env delete tmp_spi_path
+fi
+
+if test -n "${param_spidev_spi_bus}"; then
+	test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000"
+	test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000"
+	fdt set /soc/${tmp_spi_path} status "okay"
+	fdt set /soc/${tmp_spi_path}/spidev status "okay"
+	if test -n "${param_spidev_max_freq}"; then
+		fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+	fi
+	if test "${param_spidev_spi_cs}" = "1"; then
+		fdt set /soc/${tmp_spi_path}/spidev reg "<1>"
+	fi
+	env delete tmp_spi_path
+fi
+
+if test -n "${param_pps_pin}"; then
+	setenv tmp_bank "${param_pps_pin}"
+	setenv tmp_pin "${param_pps_pin}"
+	run decompose_pin
+	fdt set /soc/pinctrl@300b000/pps_pins pins "${param_pps_pin}"
+	fdt get value tmp_phandle /soc/pinctrl@300b000 phandle
+	fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>"
+	env delete tmp_pin tmp_bank tmp_phandle
+fi
+
+if test "${param_pps_falling_edge}" = "1"; then
+	fdt set /pps@0 assert-falling-edge
+fi
+
+#for f in ${overlays}; do
+#	if test "${f}" = "pwm"; then
+#		setenv bootargs_new ""
+#		for arg in ${bootargs}; do
+#			if test "${arg}" = "console=ttyS0,115200"; then
+#				echo "Warning: Disabling ttyS0 console due to enabled PWM overlay"
+#			else
+#				setenv bootargs_new "${bootargs_new} ${arg}"
+#			fi
+#		done
+#		setenv bootargs "${bootargs_new}"
+#	fi
+#done
+
+if test -n "${param_w1_pin}"; then
+	setenv tmp_bank "${param_w1_pin}"
+	setenv tmp_pin "${param_w1_pin}"
+	run decompose_pin
+	fdt set /soc/pinctrl@300b000/w1_pins pins "${param_w1_pin}"
+	fdt get value tmp_phandle /soc/pinctrl@300b000 phandle
+	fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>"
+	env delete tmp_pin tmp_bank tmp_phandle
+fi
+
+if test "${param_w1_pin_int_pullup}" = "1"; then
+	fdt set /soc/pinctrl@300b000/w1_pins bias-pull-up
+fi
+
+if test "${param_uart1_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart1-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart1-rts-cts-pins phandle
+	fdt set /soc/serial@5000400 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000400 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000400 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test "${param_uart2_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart2-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart2-rts-cts-pins phandle
+	fdt set /soc/serial@5000800 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000800 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000800 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test "${param_uart3_rtscts}" = "1"; then
+	fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart3-pins phandle
+	fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart3-rts-cts-pins phandle
+	fdt set /soc/serial@5000c00 pinctrl-names "default" "default"
+	fdt set /soc/serial@5000c00 pinctrl-0 "<${tmp_phandle1}>"
+	fdt set /soc/serial@5000c00 pinctrl-1 "<${tmp_phandle2}>"
+	env delete tmp_phandle1 tmp_phandle2
+fi

arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c3.dts

@@ -0,0 +1,20 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			i2c3 = "/soc/i2c@5002c00";
+		};
+	};
+
+	fragment@1 {
+		target = <&i2c3>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-i2c4.dts

@@ -0,0 +1,20 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			i2c4 = "/soc/i2c@5003000";
+		};
+	};
+
+	fragment@1 {
+		target = <&i2c4>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts

@@ -0,0 +1,42 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			spi0 = "/soc/spi@5010000";
+			spi1 = "/soc/spi@5011000";
+		};
+	};
+
+	fragment@1 {
+		target = <&spi0>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev@0 {
+				compatible = "spidev";
+				status = "disabled";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+
+	fragment@2 {
+		target = <&spi1>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spidev@0 {
+				compatible = "spidev";
+				status = "disabled";
+				reg = <0>;
+				spi-max-frequency = <1000000>;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart2.dts

@@ -0,0 +1,20 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			serial2 = "/soc/serial@5000800";
+		};
+	};
+
+	fragment@1 {
+		target = <&uart2>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-uart5.dts

@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h616";
+
+	fragment@0 {
+		target-path = "/aliases";
+		__overlay__ {
+			serial5 = "/soc/serial@5001400";
+		};
+	};
+
+	fragment@1 {
+		target = <&uart5>;
+		 __overlay__ {
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart5_ph_pins>;
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2-b.dts

@@ -137,8 +137,8 @@
 	phy-mode = "rgmii";
 	phy-handle = <&ext_rgmii_phy>;
 	phy-supply = <&reg_dcdce>;
-	allwinner,rx-delay-ps = <1500>;
-	allwinner,tx-delay-ps = <700>;
+	allwinner,rx-delay-ps = <100>;
+	allwinner,tx-delay-ps = <500>;
 	status = "okay";
 };
 
@@ -246,7 +246,7 @@
 				regulator-always-on;
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc1v8";
+				regulator-name = "vcc-pg";
 			};
 
 			cldo2 {
@@ -273,8 +273,8 @@
 
 			reg_dcdcd: dcdcd {
 				regulator-always-on;
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
 				regulator-name = "vdd-dram";
 			};
 
@@ -334,13 +334,25 @@
 &i2c3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c3_ph_pins>;
-	status = "okay";
+	status = "disabled";
+};
+
+&i2c4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c4_ph_pins>;
+	status = "disabled";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_ph_pins>;
+	status = "disabled";
 };
 
 &uart5 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart5_ph_pins>;
-	status = "okay";
+	status = "disabled";
 };
 
 &ir {
@@ -352,11 +364,11 @@
 &spi1 {
 	#address-cells = <1>;
 	#size-cells = <0>;
-	status = "okay";
+	status = "disabled";
 
 	spidev@1 {
 		compatible = "spidev";
-		status = "okay";
+		status = "disabled";
 		reg = <0>;
 		spi-max-frequency = <1000000>;
 	};