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More support for RISC-V #3

Merged
merged 3 commits into from Sep 25, 2021
Merged

More support for RISC-V #3

merged 3 commits into from Sep 25, 2021

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stikonas
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  • Updated M1 definitions file (there was a copy-paste error where I forgot to recalculate hex values for some rare instructions), also add multiplication/division operations.
  • Add RISCV-64 ELF debug header.
  • Add bootstrap.c file. (This one is less tested and might have some bugs in assembly).

@oriansj oriansj merged commit 103ee7a into oriansj:main Sep 25, 2021
@stikonas stikonas deleted the riscv64 branch September 25, 2021 11:17
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@stikonas @oriansj