Skip to content

Commit

Permalink
Support Gearbox peer setting
Browse files Browse the repository at this point in the history
  • Loading branch information
chungshien-chai committed Jun 28, 2024
1 parent ec211a3 commit 97acc0e
Show file tree
Hide file tree
Showing 15 changed files with 329 additions and 281 deletions.
27 changes: 27 additions & 0 deletions tests/unittest/ModelConfig/apis/config_attributes.mapping.json
Original file line number Diff line number Diff line change
Expand Up @@ -76,8 +76,18 @@
},
"I_SERDES.BYPASS" : {
"rules" : {
"WIDTH" : "__arg0__"
},
"results" : {
"__other__" : [
{
"__define__" : "parse_serdes_width",
"PEER_IS_ON" : "__peer_is_on__",
"RX_BYPASS" : "RX_gear_on"
}
]
},
"neg_results" : {
"RX_BYPASS" : "RX_gear_on"
}
},
Expand Down Expand Up @@ -105,8 +115,18 @@
},
"O_SERDES.BYPASS" : {
"rules" : {
"WIDTH" : "__arg0__"
},
"results" : {
"__other__" : [
{
"__define__" : "parse_serdes_width",
"PEER_IS_ON" : "__peer_is_on__",
"TX_BYPASS" : "TX_gear_on"
}
]
},
"neg_results" : {
"TX_BYPASS" : "TX_gear_on"
}
},
Expand Down Expand Up @@ -649,6 +669,13 @@
"__fclk_buf_root_mux_sel__ = (40 + fabric_clock_buffer_slot - 4) if (fabric_clock_buffer_slot >= 4) else (44 + fabric_clock_buffer_slot)",
"__fclk_buf_root_mux_sel__ = '%d' % __fclk_buf_root_mux_sel__"
]
},
"parse_serdes_width" : {
"__args__" : ["__peer_is_on__"],
"__equation__" : [
"width = int('__arg0__')",
"__peer_is_on__ = 'PEER_on' if width <= 5 else 'PEER_off'"
]
}
}
}
44 changes: 26 additions & 18 deletions tests/unittest/ModelConfig/golden/model_config.ppdb.json
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@
"Merge properties into instances",
" Assign Property:IOSTANDARD value:LVCMOS_18_HP to \"$iopadmap$top.clk0\"",
" Assign Property:PACKAGE_PIN value:HR_1_CC_38_19P to \"$iopadmap$top.clk0\"",
" Assign Property:IOSTANDARD value:LVCMOS_18_HP to \"$auto$clkbufmap.cc:284:execute$458\"",
" Assign Property:PACKAGE_PIN value:HR_1_CC_38_19P to \"$auto$clkbufmap.cc:284:execute$458\"",
" Assign Property:IOSTANDARD value:LVCMOS_18_HP to \"$auto$clkbufmap.cc:284:execute$507\"",
" Assign Property:PACKAGE_PIN value:HR_1_CC_38_19P to \"$auto$clkbufmap.cc:284:execute$507\"",
" Assign Property:IOSTANDARD value:LVCMOS_18_HR to \"$iopadmap$top.din\"",
" Assign Property:PACKAGE_PIN value:HR_1_4_2P to \"$iopadmap$top.din\"",
" Assign Property:IOSTANDARD value:LVCMOS_18_HR to \"i_delay\"",
Expand All @@ -18,7 +18,7 @@
" Assign Property:PACKAGE_PIN value:HR_1_6_3P to \"o_delay\"",
"Re-location instances",
" Overwrite location value:$iopadmap$top.clk0 to \"HR_1_CC_38_19P\" (value existing: HR_1_CC_18_9P)",
" Overwrite location value:$auto$clkbufmap.cc:284:execute$458 to \"HR_1_CC_38_19P\" (value existing: HR_1_CC_18_9P)",
" Overwrite location value:$auto$clkbufmap.cc:284:execute$507 to \"HR_1_CC_38_19P\" (value existing: HR_1_CC_18_9P)",
" Overwrite location value:$iopadmap$top.din to \"HR_1_4_2P\" (value existing: HP_1_20_10P)",
" Overwrite location value:i_delay to \"HR_1_4_2P\" (value existing: HP_1_20_10P)",
" Overwrite location value:$iopadmap$top.dout to \"HR_1_6_3P\" (value existing: HP_2_20_10P)",
Expand All @@ -32,7 +32,7 @@
" Object: FABRIC_CLKBUF#0",
" Assign location for child from instance-without-location",
"Allocate FCLK routing resource",
" CLKBUF $auto$clkbufmap.cc:284:execute$458 (location:HR_1_CC_38_19P)",
" CLKBUF $auto$clkbufmap.cc:284:execute$507 (location:HR_1_CC_38_19P)",
" Route to gearbox module i_delay (location:HR_1_4_2P)",
" Use FCLK: hvl_fclk_0_A",
" CLKBUF clk_buf (location:HP_1_CC_18_9P)",
Expand All @@ -47,10 +47,10 @@
" Use FCLK: hvl_fclk_1_A",
" Route to gearbox module o_serdes_clk (location:HR_2_4_2P)",
" Use FCLK: hvl_fclk_1_A",
" CLKBUF $auto$clkbufmap.cc:284:execute$463 (location:HR_5_CC_38_19P)",
" CLKBUF $auto$clkbufmap.cc:284:execute$512 (location:HR_5_CC_38_19P)",
"Set CLKBUF configuration attributes",
" Set FCLK configuration attributes",
" CLKBUF $auto$clkbufmap.cc:284:execute$458 (location:HR_1_CC_38_19P) use hvl_fclk_0_A",
" CLKBUF $auto$clkbufmap.cc:284:execute$507 (location:HR_1_CC_38_19P) use hvl_fclk_0_A",
" Set FCLK configuration attributes",
" Skip for HR_5_CC_38_19P",
"Allocate PLL resource (and set PLLREF configuration attributes)",
Expand Down Expand Up @@ -79,7 +79,7 @@
" Property",
" Rule I_BUF.IOSTANDARD",
" Match",
" Module: CLK_BUF ($auto$clkbufmap.cc:284:execute$458)",
" Module: CLK_BUF ($auto$clkbufmap.cc:284:execute$507)",
" Object: clk0",
" Parameter",
" Property",
Expand Down Expand Up @@ -123,7 +123,7 @@
" Property",
" Rule I_BUF.IOSTANDARD",
" Mismatch",
" Module: CLK_BUF ($auto$clkbufmap.cc:284:execute$463)",
" Module: CLK_BUF ($auto$clkbufmap.cc:284:execute$512)",
" Object: clk2",
" Parameter",
" Property",
Expand Down Expand Up @@ -218,6 +218,7 @@
" Parameter",
" Rule I_SERDES.BYPASS",
" Match",
" Defined function: parse_serdes_width",
" Rule I_SERDES.DDR_MODE",
" Match",
" Rule I_SERDES.DPA_MODE",
Expand Down Expand Up @@ -252,6 +253,7 @@
" Parameter",
" Rule O_SERDES.BYPASS",
" Match",
" Defined function: parse_serdes_width",
" Rule O_SERDES.DDR_MODE",
" Match",
" Property",
Expand Down Expand Up @@ -357,7 +359,7 @@
" Rule O_DDR",
" Match",
" Property",
" Module: FCLK_BUF ($auto$clkbufmap.cc:282:execute$461)",
" Module: FCLK_BUF ($auto$clkbufmap.cc:282:execute$510)",
" Object: FABRIC_CLKBUF#0",
" Parameter",
" Rule FCLK_BUF",
Expand Down Expand Up @@ -410,7 +412,7 @@
},
{
"module" : "CLK_BUF",
"name" : "$auto$clkbufmap.cc:284:execute$458",
"name" : "$auto$clkbufmap.cc:284:execute$507",
"linked_object" : "clk0",
"linked_objects" : {
"clk0" : {
Expand Down Expand Up @@ -450,7 +452,7 @@
},
"connectivity" : {
"I" : "$iopadmap$clk0",
"O" : "$auto$clkbufmap.cc:317:execute$460"
"O" : "$auto$clkbufmap.cc:317:execute$509"
},
"parameters" : {
"ROUTE_TO_FABRIC_CLK" : "0"
Expand Down Expand Up @@ -627,7 +629,7 @@
"connectivity" : {
"CLK_IN" : "clk1_buf",
"CLK_OUT" : "pll_clk",
"CLK_OUT_DIV4" : "$delete_wire$487"
"CLK_OUT_DIV4" : "$delete_wire$540"
},
"parameters" : {
"OUT0_ROUTE_TO_FABRIC_CLK" : "1",
Expand Down Expand Up @@ -706,7 +708,7 @@
},
{
"module" : "CLK_BUF",
"name" : "$auto$clkbufmap.cc:284:execute$463",
"name" : "$auto$clkbufmap.cc:284:execute$512",
"linked_object" : "clk2",
"linked_objects" : {
"clk2" : {
Expand All @@ -732,7 +734,7 @@
},
"connectivity" : {
"I" : "$iopadmap$clk2",
"O" : "$auto$clkbufmap.cc:317:execute$465"
"O" : "$auto$clkbufmap.cc:317:execute$514"
},
"parameters" : {
"ROUTE_TO_FABRIC_CLK" : "2"
Expand Down Expand Up @@ -1091,7 +1093,7 @@
}
},
"connectivity" : {
"CLK_IN" : "$auto$clkbufmap.cc:317:execute$460",
"CLK_IN" : "$auto$clkbufmap.cc:317:execute$509",
"I" : "$iopadmap$din",
"O" : "din_delay"
},
Expand Down Expand Up @@ -1194,6 +1196,9 @@
"properties" : {
},
"config_attributes" : [
{
"PEER_IS_ON" : "PEER_off"
},
{
"RX_BYPASS" : "RX_gear_on"
},
Expand Down Expand Up @@ -1382,6 +1387,9 @@
"properties" : {
},
"config_attributes" : [
{
"PEER_IS_ON" : "PEER_on"
},
{
"TX_BYPASS" : "TX_gear_on"
},
Expand All @@ -1398,7 +1406,7 @@
},
"parameters" : {
"DATA_RATE" : "DDR",
"WIDTH" : "8"
"WIDTH" : "4"
},
"pre_primitive" : "O_BUF",
"post_primitives" : [
Expand Down Expand Up @@ -1866,7 +1874,7 @@
},
{
"module" : "FCLK_BUF",
"name" : "$auto$clkbufmap.cc:282:execute$461",
"name" : "$auto$clkbufmap.cc:282:execute$510",
"linked_object" : "FABRIC_CLKBUF#0",
"linked_objects" : {
"FABRIC_CLKBUF#0" : {
Expand All @@ -1884,7 +1892,7 @@
}
},
"connectivity" : {
"I" : "$auto$clkbufmap.cc:285:execute$462",
"I" : "$auto$clkbufmap.cc:285:execute$511",
"O" : "clk0_div"
},
"parameters" : {
Expand Down
Loading

0 comments on commit 97acc0e

Please sign in to comment.