ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge

This is a model of the PCIe host bridge found on Power8 chips, including IOMMU support, PCIe root complex etc... This implementation doesn't emulate the EEH error handling (and may never do). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [clg: updated for qemu-2.11 QOM'ified the models introduced pnv_chip_phb_realize() to create the PHB3 objects updated the XICSFabric handlers to loop on the PHB3 ICS fixed the XIVE update fixed IRQ number overlap in pnv_phb3_remap_irqs() ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
ozbenh · Oct 6, 2017 · 15d0fda · 15d0fda
1 parent 1e4f0e4
commit 15d0fda
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Showing 13 changed files with 2,624 additions and 5 deletions.
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
@@ -219,7 +219,7 @@ void icp_eoi(ICPState *icp, uint32_t xirr)
     }
 }
 
-static void icp_irq(ICSState *ics, int server, int nr, uint8_t priority)
+void icp_irq(ICSState *ics, int server, int nr, uint8_t priority)
 {
     ICPState *icp = xics_icp_get(ics->xics, server);
 

diff --git a/hw/pci-host/Makefile.objs b/hw/pci-host/Makefile.objs
@@ -17,3 +17,4 @@ common-obj-$(CONFIG_PCI_PIIX) += piix.o
 common-obj-$(CONFIG_PCI_Q35) += q35.o
 common-obj-$(CONFIG_PCI_GENERIC) += gpex.o
 common-obj-$(CONFIG_PCI_XILINX) += xilinx-pcie.o
+obj-$(CONFIG_POWERNV) += pnv_phb3.o pnv_phb3_pbcq.o pnv_phb3_rc.o pnv_phb3_msi.o