Skip to content

Commit

Permalink
Typo fixed
Browse files Browse the repository at this point in the history
Fixed typo on the description of the instruction SUBB.
  • Loading branch information
parraman committed Feb 23, 2018
1 parent 9c47834 commit 54a52bb
Showing 1 changed file with 13 additions and 13 deletions.
26 changes: 13 additions & 13 deletions docs/instruction-set.rst
Original file line number Diff line number Diff line change
Expand Up @@ -1125,26 +1125,26 @@ referenced by Operand 1.

.. _instruction-subb:

SUBB: 16-bits substraction
^^^^^^^^^^^^^^^^^^^^^^^^^^
SUBB: 8-bits substraction
^^^^^^^^^^^^^^^^^^^^^^^^^

Performs a substraction of two 8-bits integers. Every form of the instruction
will have two operands. Operand 1 will always be a reference to an 8-bits
register. The integer contained by the register will be substracted from the
value referenced by Operand 2. The result will be stored in the register
referenced by Operand 1.

+-----------+-------------------+-------------------+----------------------+
| Opcode | Operand 1 | Operand 2 | Example |
+===========+===================+===================+======================+
| 29 (0x1D) | *REGISTER_16BITS* | *REGISTER_16BITS* | ``SUBB BH, DL`` |
+-----------+-------------------+-------------------+----------------------+
| 30 (0x1E) | *REGISTER_16BITS* | *REGADDRESS* | ``SUBB CH, [A-100]`` |
+-----------+-------------------+-------------------+----------------------+
| 31 (0x1F) | *REGISTER_16BITS* | *ADDRESS* | ``SUBB DL, [0x400]`` |
+-----------+-------------------+-------------------+----------------------+
| 32 (0x20) | *REGISTER_16BITS* | *WORD* | ``SUBB BL, 0x10`` |
+-----------+-------------------+-------------------+----------------------+
+-----------+------------------+------------------+----------------------+
| Opcode | Operand 1 | Operand 2 | Example |
+===========+==================+==================+======================+
| 29 (0x1D) | *REGISTER_8BITS* | *REGISTER_8BITS* | ``SUBB BH, DL`` |
+-----------+------------------+------------------+----------------------+
| 30 (0x1E) | *REGISTER_8BITS* | *REGADDRESS* | ``SUBB CH, [A-100]`` |
+-----------+------------------+------------------+----------------------+
| 31 (0x1F) | *REGISTER_8BITS* | *ADDRESS* | ``SUBB DL, [0x400]`` |
+-----------+------------------+------------------+----------------------+
| 32 (0x20) | *REGISTER_8BITS* | *WORD* | ``SUBB BL, 0x10`` |
+-----------+------------------+------------------+----------------------+

.. _instruction-svc:

Expand Down

0 comments on commit 54a52bb

Please sign in to comment.