add gpio to vna

pavel-demin · Oct 4, 2017 · 18a3c1a · 18a3c1a
1 parent 4c9378d
commit 18a3c1a
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Showing 2 changed files with 27 additions and 6 deletions.
diff --git a/projects/vna/block_design.tcl b/projects/vna/block_design.tcl
@@ -61,6 +61,14 @@ cell pavel-demin:user:axis_red_pitaya_dac:1.0 dac_0 {} {
   dac_dat dac_dat_o
 }
 
+# GPIO
+
+# Delete input/output port
+delete_bd_objs [get_bd_ports exp_p_tri_io]
+
+# Create output port
+create_bd_port -dir O -from 7 -to 0 exp_p_tri_io
+
 # CFG
 
 # Create axi_cfg_register
@@ -93,20 +101,28 @@ cell xilinx.com:ip:xlslice:1.0 slice_2 {
 
 # Create xlslice
 cell xilinx.com:ip:xlslice:1.0 slice_3 {
-  DIN_WIDTH 96 DIN_FROM 63 DIN_TO 32 DOUT_WIDTH 32
+  DIN_WIDTH 96 DIN_FROM 15 DIN_TO 8 DOUT_WIDTH 8
 } {
   Din cfg_0/cfg_data
+  Dout exp_p_tri_io
 }
 
 # Create xlslice
 cell xilinx.com:ip:xlslice:1.0 slice_4 {
-  DIN_WIDTH 96 DIN_FROM 79 DIN_TO 64 DOUT_WIDTH 16
+  DIN_WIDTH 96 DIN_FROM 63 DIN_TO 32 DOUT_WIDTH 32
 } {
   Din cfg_0/cfg_data
 }
 
 # Create xlslice
 cell xilinx.com:ip:xlslice:1.0 slice_5 {
+  DIN_WIDTH 96 DIN_FROM 79 DIN_TO 64 DOUT_WIDTH 16
+} {
+  Din cfg_0/cfg_data
+}
+
+# Create xlslice
+cell xilinx.com:ip:xlslice:1.0 slice_6 {
   DIN_WIDTH 96 DIN_FROM 95 DIN_TO 80 DOUT_WIDTH 16
 } {
   Din cfg_0/cfg_data
@@ -139,7 +155,7 @@ cell pavel-demin:user:axis_interpolator:1.0 inter_0 {
   CNTR_WIDTH 32
 } {
   S_AXIS fifo_0/M_AXIS
-  cfg_data slice_3/Dout
+  cfg_data slice_4/Dout
   aclk pll_0/clk_out1
   aresetn slice_1/Dout
 }
@@ -207,7 +223,7 @@ cell xilinx.com:ip:xbip_dsp48_macro:3.0 mult_4 {
   P_WIDTH 15
 } {
   A dds_slice_1/Dout
-  B slice_4/Dout
+  B slice_5/Dout
   CARRYIN lfsr_0/m_axis_tdata
   CLK pll_0/clk_out1
 }
@@ -223,7 +239,7 @@ cell xilinx.com:ip:xbip_dsp48_macro:3.0 mult_5 {
   P_WIDTH 15
 } {
   A dds_slice_1/Dout
-  B slice_5/Dout
+  B slice_6/Dout
   CARRYIN lfsr_0/m_axis_tdata
   CLK pll_0/clk_out1
 }

diff --git a/projects/vna/server/vna.c b/projects/vna/server/vna.c
@@ -29,7 +29,7 @@ int main(int argc, char *argv[])
   volatile void *cfg, *sts;
   volatile uint32_t *rx_freq, *rx_size;
   volatile int16_t *tx_level[2];
-  volatile uint8_t *rst;
+  volatile uint8_t *rst, *gpio;
   struct sockaddr_in addr;
   uint32_t command, rate;
   int32_t value, corr;
@@ -50,6 +50,7 @@ int main(int argc, char *argv[])
   rx_cntr = ((uint16_t *)(sts + 12));
 
   rst = ((uint8_t *)(cfg + 0));
+  gpio = ((uint8_t *)(cfg + 1));
   rx_size = ((uint32_t *)(cfg + 4));
   tx_level[0] = ((int16_t *)(cfg + 8));
   tx_level[1] = ((int16_t *)(cfg + 10));
@@ -66,6 +67,7 @@ int main(int argc, char *argv[])
 
   *rst &= ~3;
   *rst |= 4;
+  *gpio = 0;
 
   if((sock_server = socket(AF_INET, SOCK_STREAM, 0)) < 0)
   {
@@ -103,6 +105,8 @@ int main(int argc, char *argv[])
       return EXIT_FAILURE;
     }
 
+    *gpio = 1;
+
     while(1)
     {
       if(recv(sock_client, (char *)&command, 4, MSG_WAITALL) <= 0) break;
@@ -179,6 +183,7 @@ int main(int argc, char *argv[])
 
     *rst &= ~3;
     *rst |= 4;
+    *gpio = 0;
     sock_thread = -1;
     close(sock_client);
   }