GitHub - pavels/Xilinx-SEU-Simulator: Set of scripts to simulate SEU faults in Xilinx FPGAs including Spartan3

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Set of scripts to simulate SEU faults in Xilinx FPGAs including Spartan3

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Name		Name	Last commit message	Last commit date
Latest commit History 4 Commits
fault-generator		fault-generator
reconf_demo_mult		reconf_demo_mult
reconf_demo_mult_tmr		reconf_demo_mult_tmr
README		README
xc3sprog.patch		xc3sprog.patch

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This collection of tools is intended for simulating SEU errors in Xilinx FPGAs. It is fully automated system, which randomly places errors into content of LUTs. It uses real hardware (for now Spartan3 is supported and tested) and partial reconfiguration techniques.

Please visit Wiki for more details.