This repository contains additional IP modules for PlutoSDR.
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util_cpack2_timestamp - Implements a sample timestamping mechanism for the receive path. When integrated into the PlutoSDR HDL product between the original cpack module and DMA controller the module allows timestamps to be optionally appended at the start of sample blocks.
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util_upack2_timestamp - Implements a sample timestamping mechanism for the transmit path. When integrated into the PlutoSDR HDL product between the original DMA controller and upack module the module allows timestamps to be optionally read from the start of sample blocks. The timestamps will be used to hold samples until the transmission time is reached.
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util_wr_sync_mux - Implements a multiplexer with clock domain crossing. The TDD module within the ADALM-PLUTO generates a DMA write synchronization signal. This signal is also generated by the timestamping sub-system. When timestamping is enabled, the signal from the timestamping system is selected. Otherwise a secondary "external" signal, typically from the TDD module is selected.
For more information see: Private LTE with ADALM-PLUTO.