Merge pull request #274 from phanrahan/mixed-direction-array

Update coreir backend to support arrays of mixed direction

magma/backend/coreir_.py

@@ -104,9 +104,9 @@ def check_type(port, errorMessage=""):
         for name, port in definition.interface.ports.items():
             check_type(type(port), 'Error: Argument {} must be comprised only of Bit, Array, or Tuple')
 
-    def get_type(self, port, is_input):
+    def get_type(self, port):
         if isinstance(port, (ArrayType, ArrayKind)):
-            _type = self.context.Array(port.N, self.get_type(port.T, is_input))
+            _type = self.context.Array(port.N, self.get_type(port.T))
         elif isinstance(port, (TupleType, TupleKind)):
             def to_string(k):
                 """
@@ -119,10 +119,10 @@ def to_string(k):
                     return f"_{k}"
                 return k
             _type = self.context.Record({
-                to_string(k): self.get_type(t, t.isinput()) for (k, t) in
+                to_string(k): self.get_type(t) for (k, t) in
                 zip(port.Ks, port.Ts)
             })
-        elif is_input:
+        elif port.isinput():
             if isinstance(port, (ClockType, ClockKind)):
                 _type = self.context.named_types[("coreir", "clk")]
             elif isinstance(port, (AsyncResetType, AsyncResetKind)):
@@ -178,10 +178,7 @@ def get_ports_as_list(self, ports):
     def convert_interface_to_module_type(self, interface):
         args = OrderedDict()
         for name, port in interface.ports.items():
-            if not port.isinput() and not port.isoutput() and \
-                    not isinstance(port, TupleType):
-                raise NotImplementedError()
-            args[name] = self.get_type(port, port.isinput())
+            args[name] = self.get_type(port)
         return self.context.Record(args)
 
     def compile_instance(self, instance, module_definition):
@@ -221,10 +218,7 @@ def compile_instance(self, instance, module_definition):
     def add_output_port(self, output_ports, port):
         if port.isoutput():
             output_ports[port] = magma_port_to_coreir(port)
-            if isinstance(port, ArrayType):
-                for element in port:
-                    self.add_output_port(output_ports, element)
-        if isinstance(port, TupleType):
+        if isinstance(port, (TupleType, ArrayType)):
             for element in port:
                 self.add_output_port(output_ports, element)
 
@@ -275,7 +269,7 @@ def compile_definition_to_module_definition(self, definition, module_definition)
     def connect_input(self, module_definition, port,
                       output_ports):
         if not port.isinput():
-            if isinstance(port, TupleType):
+            if isinstance(port, (TupleType, ArrayType)):
                 for elem in port:
                     self.connect_input(module_definition, elem,
                                        output_ports)

tests/test_coreir/gold/test_array_nesting.json

@@ -0,0 +1,25 @@
+{"top":"global.Foo",
+"namespaces":{
+  "global":{
+    "modules":{
+      "Foo":{
+        "type":["Record",[
+          ["IFC",["Array",10,["Record",[["I","BitIn"],["O","Bit"]]]]]
+        ]],
+        "connections":[
+          ["self.IFC.0.O","self.IFC.0.I"],
+          ["self.IFC.1.O","self.IFC.1.I"],
+          ["self.IFC.2.O","self.IFC.2.I"],
+          ["self.IFC.3.O","self.IFC.3.I"],
+          ["self.IFC.4.O","self.IFC.4.I"],
+          ["self.IFC.5.O","self.IFC.5.I"],
+          ["self.IFC.6.O","self.IFC.6.I"],
+          ["self.IFC.7.O","self.IFC.7.I"],
+          ["self.IFC.8.O","self.IFC.8.I"],
+          ["self.IFC.9.O","self.IFC.9.I"]
+        ]
+      }
+    }
+  }
+}
+}

tests/test_coreir/test_coreir_tuple.py

@@ -64,5 +64,15 @@ def test_nesting():
     assert check_files_equal(__file__, f"build/test_nesting.json",
                              f"gold/test_nesting.json")
 
+def test_array_nesting():
+    T = m.Array(10, m.Tuple(I=m.In(m.Bit), O=m.Out(m.Bit)))
+    Foo = m.DefineCircuit("Foo", "IFC", T)
+    for i in range(10):
+        m.wire(Foo.IFC[i].I, Foo.IFC[i].O)
+    m.EndCircuit()
+    m.compile("build/test_array_nesting", Foo, output="coreir")
+    assert check_files_equal(__file__, f"build/test_array_nesting.json",
+                             f"gold/test_array_nesting.json")
+
 if __name__ == "__main__":
     test_multi_direction_tuple()