Add initial support for coreir-verilog instance params #463
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This fixes a bug where the logic to passthrough instance parameters to verilog (
<mod>(key=value)
) only worked with theverilog
backend. This adds support to the pattern for thecoreir-verilog
backend by adding an additional parameterparam_map
to the from verilog constructs. This is required so that the coreir definitions can be instanced with the parameters are config args (otherwise we get aArgs and params are not the same!
assertion failure).This is a hotfix to add the feature, but we may want to consider an alternative solution for the longer term: Add a metadata field for passing through these verilog parameters as key/value strings. Since this is reserved for working with verilog black boxes, perhaps it's best to just treat this as sidechannel information that's just passed through the compiler, rather than converting from verilog to coreir types then back.
@rdaly525 The basic summary of the issue is: we have black box verilog that is being imported into magma. These verilog modules have parameters that we'd like to pass through when instancing (they don't affect the interface). The current workaround is to have the user explicitly declare the parameter types so they are converted to coreir config args. The other option is to have coreir have a notion of black box parameters that are just passed through to the instance of the black box verilog.
Other comments/suggestions welcome