Add generation for LogicalShiftRightRR.

Sort cases for readability
pharo-project · Mar 15, 2024 · 65d0b85 · 65d0b85
1 parent d8fa333
commit 65d0b85
Showing 1 changed file with 6 additions and 1 deletion.
diff --git a/smalltalksrc/VMMaker/CogX64Compiler.class.st b/smalltalksrc/VMMaker/CogX64Compiler.class.st
@@ -3465,11 +3465,16 @@ CogX64Compiler >> dispatchConcretize [
 		[LoadEffectiveAddressMwrR]	-> [^self concretizeLoadEffectiveAddressMwrR].
 		[RotateLeftCqR]				-> [^self concretizeShiftCqRegOpcode: 0].
 		[RotateRightCqR]				-> [^self concretizeShiftCqRegOpcode: 1].
+
 		[ArithmeticShiftRightCqR]		-> [^self concretizeShiftCqRegOpcode: 7].
+		[ArithmeticShiftRightRR]			-> [^self concretizeShiftRegRegOpcode: 7].
+
 		[LogicalShiftRightCqR]			-> [^self concretizeShiftCqRegOpcode: 5].
+		[LogicalShiftRightRR]			-> [^self concretizeShiftRegRegOpcode: 5].
+
 		[LogicalShiftLeftCqR]			-> [^self concretizeShiftCqRegOpcode: 4].
-		[ArithmeticShiftRightRR]			-> [^self concretizeShiftRegRegOpcode: 7].
 		[LogicalShiftLeftRR]				-> [^self concretizeShiftRegRegOpcode: 4].
+
 		"Data Movement"
 		[MoveCqR]			-> [^self concretizeMoveCqR].
 		[MoveCwR]			-> [^self concretizeMoveCwR].