RISC-V: Fix T-Head Fmv vendor extension encoding

A recent change in the XTheadFmv spec fixed an encoding bug in the document. This patch changes the code to follow this bugfix. Spec patch can be found here: T-head-Semi/thead-extension-spec#11 Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
plctlab · Dec 16, 2022 · f6a61fe · f6a61fe
1 parent 9dff6a5
commit f6a61fe
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Showing 2 changed files with 4 additions and 4 deletions.
diff --git a/gas/testsuite/gas/riscv/x-thead-fmv.d b/gas/testsuite/gas/riscv/x-thead-fmv.d
@@ -7,5 +7,5 @@
 Disassembly of section .text:
 
 0+000 <target>:
-[ 	]+[0-9a-f]+:[ 	]+6005950b[ 	]+th.fmv.hw.x[ 	]+a0,fa1
-[ 	]+[0-9a-f]+:[ 	]+5005158b[ 	]+th.fmv.x.hw[ 	]+a1,fa0
+[ 	]+[0-9a-f]+:[ 	]+5005950b[ 	]+th.fmv.hw.x[ 	]+a0,fa1
+[ 	]+[0-9a-f]+:[ 	]+6005158b[ 	]+th.fmv.x.hw[ 	]+a1,fa0
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
@@ -2209,9 +2209,9 @@
 #define MATCH_TH_FSURW 0x5000700b
 #define MASK_TH_FSURW 0xf800707f
 /* Vendor-specific (T-Head) XTheadFmv instructions. */
-#define MATCH_TH_FMV_HW_X 0x6000100b
+#define MATCH_TH_FMV_HW_X 0x5000100b
 #define MASK_TH_FMV_HW_X 0xfff0707f
-#define MATCH_TH_FMV_X_HW 0x5000100b
+#define MATCH_TH_FMV_X_HW 0x6000100b
 #define MASK_TH_FMV_X_HW 0xfff0707f
 /* Vendor-specific (T-Head) XTheadInt instructions. */
 #define MATCH_TH_IPOP 0x0050000b