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target/avr/disas: Fix store instructions display order
While LOAD instructions use the target register as first argument, STORE instructions use it as second argument: LD Rd, X // Rd <- (X) ST Y, Rd // (Y) <- Rr Reported-by: Joaquin de Andres <me@xcancerberox.com.ar> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200707070021.10031-4-f4bug@amsat.org>
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