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2021.02
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@Cyril-Jean Cyril-Jean released this 24 Feb 17:24
· 394 commits to master since this release
2021.02
15e52b8

This release adds support for BFM simulations of the design in Libero SoC with minimal functional changes:

  • A SmartDesign test bench is now generated and populated automatically after the reference design has been generated
  • 4 of the GPIO outputs of CoreGPIO, at address 0x4200_0000 on FIC 3, are now promoted to the top level and connected to the Raspberry Pi I/O header
  • Custom BFM simulation files have been added including commands to simulate this design
  • I2C0 has been disabled and constraints removed
  • Incorrect interrupt connections were shown in the block diagram and these have been fixed
  • Push buttons have been renamed from PBx to SWx+1 in the design and block diagram to match the naming scheme on the Icicle Kit

This release is intended to be used with Libero SoC v12.6.

This tag has been tested to boot using HSS tag 2020.12 and boot Linux, run the Microchip webserver demo and detect USB and PCIe devices using Yocto Linux builds from tag 2021.02.

A FlashPro Express programming file including this design and the HSS tag 2020.12 is available from the assets list below (Icicle-Kit-2021-02.zip).

Assets 3