arm/score and shared: define ARM hypervisor mode and alternate vector…

… table base access.

The main reason for inclusion of minimum hypervisor related defines
is that current ARM boards firmware and loaders (U-boot for example)
start loaded operating system kernel in HYP mode to allow it take
control of virtualization (Linux/KVM for example).

c/src/lib/libcpu/arm/shared/include/arm-cp15.h

@@ -1324,6 +1324,36 @@ arm_cp15_set_vector_base_address(void *base)
   );
 }
 
+ARM_CP15_TEXT_SECTION static inline void
+*arm_cp15_get_hyp_vector_base_address(void)
+{
+  ARM_SWITCH_REGISTERS;
+  void *base;
+
+  __asm__ volatile (
+    ARM_SWITCH_TO_ARM
+    "mrc p15, 4, %[base], c12, c0, 0\n"
+    ARM_SWITCH_BACK
+    : [base] "=&r" (base) ARM_SWITCH_ADDITIONAL_OUTPUT
+  );
+
+  return base;
+}
+
+ARM_CP15_TEXT_SECTION static inline void
+arm_cp15_set_hyp_vector_base_address(void *base)
+{
+  ARM_SWITCH_REGISTERS;
+
+  __asm__ volatile (
+    ARM_SWITCH_TO_ARM
+    "mcr p15, 4, %[base], c12, c0, 0\n"
+    ARM_SWITCH_BACK
+    : ARM_SWITCH_OUTPUT
+    : [base] "r" (base)
+  );
+}
+
 /**
  * @brief Sets the @a section_flags for the address range [@a begin, @a end).
  *

cpukit/score/cpu/arm/rtems/score/cpu.h

@@ -82,6 +82,7 @@
 #define ARM_PSR_M_IRQ 0x12
 #define ARM_PSR_M_SVC 0x13
 #define ARM_PSR_M_ABT 0x17
+#define ARM_PSR_M_HYP 0x1a
 #define ARM_PSR_M_UND 0x1b
 #define ARM_PSR_M_SYS 0x1f