- 👋 Hi, I’m @pratikbhuran
- 🌱 I'm a VLSI Design Engineer
- 📫 contact me at pratikbhuran16@outlook.com
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Parameterized-Designs
Parameterized-Designs PublicVerilog designs that are parameterized to fit any value of parameter.
Verilog
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sequence_detector_mealy
sequence_detector_mealy PublicDetect the sequence 11x1 in verilog using mealy FSM.
Verilog
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