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Core: Remove g_TLBLoadAddress, g_TLBStoreAddress global variables
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project64 committed May 16, 2024
1 parent ae21e10 commit 3baaa82
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Showing 4 changed files with 4 additions and 12 deletions.
4 changes: 0 additions & 4 deletions Source/Project64-core/N64System/N64System.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -969,8 +969,6 @@ bool CN64System::SetActiveSystem(bool bActive)
g_SystemTimer = &m_SystemTimer;
g_NextTimer = &m_NextTimer;
g_Plugins = m_Plugins;
g_TLBLoadAddress = &m_TLBLoadAddress;
g_TLBStoreAddress = &m_TLBStoreAddress;
g_Random = &m_Random;
}
else
Expand All @@ -985,8 +983,6 @@ bool CN64System::SetActiveSystem(bool bActive)
g_SystemTimer = nullptr;
g_NextTimer = nullptr;
g_Plugins = m_Plugins;
g_TLBLoadAddress = nullptr;
g_TLBStoreAddress = nullptr;
g_Random = nullptr;
}
}
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Original file line number Diff line number Diff line change
Expand Up @@ -323,21 +323,21 @@ void CX86RecompilerOps::PostCompileOpcode(void)

void CX86RecompilerOps::CompileReadTLBMiss(uint32_t VirtualAddress, const asmjit::x86::Gp & LookUpReg)
{
m_Assembler.MoveConstToVariable(g_TLBLoadAddress, "TLBLoadAddress", VirtualAddress);
m_Assembler.MoveConstToVariable(&m_System.m_TLBLoadAddress, "m_TLBLoadAddress", VirtualAddress);
m_Assembler.CompConstToX86reg(LookUpReg, (uint32_t)-1);
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_TLBReadMiss, false, &CX86Ops::JeLabel);
}

void CX86RecompilerOps::CompileReadTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg)
{
m_Assembler.MoveX86regToVariable(g_TLBLoadAddress, "TLBLoadAddress", AddressReg);
m_Assembler.MoveX86regToVariable(&m_System.m_TLBLoadAddress, "m_TLBLoadAddress", AddressReg);
m_Assembler.CompConstToX86reg(LookUpReg, (uint32_t)-1);
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_TLBReadMiss, false, &CX86Ops::JeLabel);
}

void CX86RecompilerOps::CompileWriteTLBMiss(const asmjit::x86::Gp & AddressReg, const asmjit::x86::Gp & LookUpReg)
{
m_Assembler.MoveX86regToVariable(&g_TLBStoreAddress, "g_TLBStoreAddress", AddressReg);
m_Assembler.MoveX86regToVariable(&m_System.m_TLBStoreAddress, "m_TLBStoreAddress", AddressReg);
m_Assembler.CompConstToX86reg(LookUpReg, (uint32_t)-1);
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, ExitReason_TLBWriteMiss, false, &CX86Ops::JeLabel);
}
Expand Down Expand Up @@ -9579,7 +9579,7 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
case ExitReason_TLBReadMiss:
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", InDelaySlot ? PIPELINE_STAGE_JUMP : PIPELINE_STAGE_NORMAL);
m_Assembler.PushImm32("EXC_RMISS", EXC_RMISS);
m_Assembler.MoveVariableToX86reg(asmjit::x86::edx, g_TLBLoadAddress, "g_TLBLoadAddress");
m_Assembler.MoveVariableToX86reg(asmjit::x86::edx, &m_System.m_TLBLoadAddress, "m_TLBLoadAddress");
m_Assembler.push(asmjit::x86::edx);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::TriggerAddressException), "CRegisters::TriggerAddressException", 12);
m_Assembler.MoveVariableToX86reg(asmjit::x86::edx, &g_System->m_JumpToLocation, "System->m_JumpToLocation");
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2 changes: 0 additions & 2 deletions Source/Project64-core/N64System/SystemGlobals.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -14,8 +14,6 @@ CN64Rom * g_Rom = nullptr; // The current ROM that this system is executing, i
CN64Rom * g_DDRom = nullptr; // 64DD IPL ROM
CN64Disk * g_Disk = nullptr; // 64DD disk
CSystemTimer * g_SystemTimer = nullptr;
uint32_t * g_TLBLoadAddress = nullptr;
uint32_t * g_TLBStoreAddress = nullptr;
CDebugger * g_Debugger = nullptr;
CMempak * g_Mempak = nullptr;
CRandom * g_Random = nullptr;
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2 changes: 0 additions & 2 deletions Source/Project64-core/N64System/SystemGlobals.h
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,6 @@ class CSystemTimer;
extern CSystemTimer * g_SystemTimer;

extern int32_t * g_NextTimer;
extern uint32_t * g_TLBLoadAddress;
extern uint32_t * g_TLBStoreAddress;

__interface CDebugger;
extern CDebugger * g_Debugger;
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