Rsp: Add a rsp AccurateEmulation flag for new rsp work

project64 · Aug 17, 2023 · 54be4d8 · 54be4d8
1 parent 09ef426
commit 54be4d8
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Showing 10 changed files with 184 additions and 155 deletions.
diff --git a/Source/Project64-rsp-core/Settings/RspSettings.cpp b/Source/Project64-rsp-core/Settings/RspSettings.cpp
@@ -6,7 +6,7 @@
 
 uint16_t Set_AudioHle = 0, Set_GraphicsHle = 0;
 bool GraphicsHle = true, AudioHle, ConditionalMove;
-bool DebuggingEnabled = false, Profiling, IndvidualBlock, ShowErrors, BreakOnStart = false, LogRDP = false, LogX86Code = false;
+bool DebuggingEnabled = false, Profiling, IndvidualBlock, ShowErrors, AccurateEmulation = false, BreakOnStart = false, LogRDP = false, LogX86Code = false;
 
 void InitializeRspSetting(void)
 {
@@ -15,6 +15,7 @@ void InitializeRspSetting(void)
     Set_AudioHle = FindSystemSettingId("HLE Audio");
 
     RegisterSetting(Set_BreakOnStart, Data_DWORD_General, "Break on Start", NULL, BreakOnStart, NULL);
+    RegisterSetting(Set_AccurateEmulation, Data_DWORD_General, "Accurate Emulation", NULL, AccurateEmulation, NULL);
     RegisterSetting(Set_CPUCore, Data_DWORD_General, "CPU Method", NULL, g_CPUCore, NULL);
     RegisterSetting(Set_LogRDP, Data_DWORD_General, "Log RDP", NULL, LogRDP, NULL);
     RegisterSetting(Set_LogX86Code, Data_DWORD_General, "Log X86 Code", NULL, LogX86Code, NULL);

diff --git a/Source/Project64-rsp-core/Settings/RspSettings.h b/Source/Project64-rsp-core/Settings/RspSettings.h
@@ -5,4 +5,4 @@ void InitializeRspSetting(void);
 
 extern uint16_t Set_AudioHle, Set_GraphicsHle;
 extern bool GraphicsHle, AudioHle, ConditionalMove;
-extern bool DebuggingEnabled, Profiling, IndvidualBlock, ShowErrors, BreakOnStart, LogRDP, LogX86Code;
+extern bool DebuggingEnabled, Profiling, IndvidualBlock, ShowErrors, AccurateEmulation, BreakOnStart, LogRDP, LogX86Code;
diff --git a/Source/Project64-rsp-core/Settings/RspSettingsID.h b/Source/Project64-rsp-core/Settings/RspSettingsID.h
@@ -3,12 +3,12 @@
 enum
 {
     Set_BreakOnStart,
+    Set_AccurateEmulation,
     Set_CPUCore,
     Set_LogRDP,
     Set_LogX86Code,
     Set_Profiling,
     Set_IndvidualBlock,
-    Set_AccurateEmulation,
     Set_ShowErrors,
 
     // Compiler settings

diff --git a/Source/Project64-rsp-core/cpu/RSPCpu.cpp b/Source/Project64-rsp-core/cpu/RSPCpu.cpp
@@ -2,6 +2,7 @@
 #include <Common/CriticalSection.h>
 #include <Project64-rsp-core/RSPDebugger.h>
 #include <Project64-rsp-core/RSPInfo.h>
+#include <Project64-rsp-core/Settings/RspSettings.h>
 #include <Project64-rsp-core/cpu/RSPRegisters.h>
 
 UDWORD EleSpec[16], Indx[16];
@@ -51,23 +52,44 @@ void Build_RSP(void)
     SetCPU(g_CPUCore);
     g_RSPDebugger->ResetTimerList();
 
-    EleSpec[0].DW = 0x0706050403020100;  // None
-    EleSpec[1].DW = 0x0706050403020100;  // None
-    EleSpec[2].DW = 0x0606040402020000;  // 0q
-    EleSpec[3].DW = 0x0707050503030101;  // 1q
-    EleSpec[4].DW = 0x0404040400000000;  // 0h
-    EleSpec[5].DW = 0x0505050501010101;  // 1h
-    EleSpec[6].DW = 0x0606060602020202;  // 2h
-    EleSpec[7].DW = 0x0707070703030303;  // 3h
-    EleSpec[8].DW = 0x0000000000000000;  // 0
-    EleSpec[9].DW = 0x0101010101010101;  // 1
-    EleSpec[10].DW = 0x0202020202020202; // 2
-    EleSpec[11].DW = 0x0303030303030303; // 3
-    EleSpec[12].DW = 0x0404040404040404; // 4
-    EleSpec[13].DW = 0x0505050505050505; // 5
-    EleSpec[14].DW = 0x0606060606060606; // 6
-    EleSpec[15].DW = 0x0707070707070707; // 7
-
+    if (AccurateEmulation)
+    {
+        EleSpec[0].DW = 0x0706050403020100;  // None
+        EleSpec[1].DW = 0x0706050403020100;  // None
+        EleSpec[2].DW = 0x0606040402020000;  // 0q
+        EleSpec[3].DW = 0x0707050503030101;  // 1q
+        EleSpec[4].DW = 0x0404040400000000;  // 0h
+        EleSpec[5].DW = 0x0505050501010101;  // 1h
+        EleSpec[6].DW = 0x0606060602020202;  // 2h
+        EleSpec[7].DW = 0x0707070703030303;  // 3h
+        EleSpec[8].DW = 0x0000000000000000;  // 0
+        EleSpec[9].DW = 0x0101010101010101;  // 1
+        EleSpec[10].DW = 0x0202020202020202; // 2
+        EleSpec[11].DW = 0x0303030303030303; // 3
+        EleSpec[12].DW = 0x0404040404040404; // 4
+        EleSpec[13].DW = 0x0505050505050505; // 5
+        EleSpec[14].DW = 0x0606060606060606; // 6
+        EleSpec[15].DW = 0x0707070707070707; // 7
+    }
+    else
+    {
+        EleSpec[0].DW = 0x0001020304050607;  // None
+        EleSpec[1].DW = 0x0001020304050607;  // None
+        EleSpec[2].DW = 0x0000020204040606;  // 0q
+        EleSpec[3].DW = 0x0101030305050707;  // 1q
+        EleSpec[4].DW = 0x0000000004040404;  // 0h
+        EleSpec[5].DW = 0x0101010105050505;  // 1h
+        EleSpec[6].DW = 0x0202020206060606;  // 2h
+        EleSpec[7].DW = 0x0303030307070707;  // 3h
+        EleSpec[8].DW = 0x0000000000000000;  // 0
+        EleSpec[9].DW = 0x0101010101010101;  // 1
+        EleSpec[10].DW = 0x0202020202020202; // 2
+        EleSpec[11].DW = 0x0303030303030303; // 3
+        EleSpec[12].DW = 0x0404040404040404; // 4
+        EleSpec[13].DW = 0x0505050505050505; // 5
+        EleSpec[14].DW = 0x0606060606060606; // 6
+        EleSpec[15].DW = 0x0707070707070707; // 7
+    }
     Indx[0].DW = 0x0001020304050607;  // None
     Indx[1].DW = 0x0001020304050607;  // None
     Indx[2].DW = 0x0103050700020406;  // 0q

diff --git a/Source/Project64-rsp-core/cpu/RSPInterpreterCPU.cpp b/Source/Project64-rsp-core/cpu/RSPInterpreterCPU.cpp
@@ -417,7 +417,6 @@ unsigned int RSP_branch_if(int condition)
 {
     unsigned int new_PC;
 
-    /* RSP_NextInstruction = DELAY_SLOT; */
     if (condition)
     {
         new_PC = *PrgCount + 4 + ((short)RSPOpC.offset << 2);

diff --git a/Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp b/Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp
@@ -1960,7 +1960,15 @@ void RSP_Vector_VMOV(void)
         RSP_ACCUM[i].HW[1] = RSP_Vect[RSPOpC.vt].ue(i, RSPOpC.e);
     }
     uint8_t Index = (RSPOpC.de & 0x7);
-    RSP_Vect[RSPOpC.vd].u16(Index) = RSP_Vect[RSPOpC.vt].ue(Index, RSPOpC.e);
+    if (AccurateEmulation)
+    {
+        RSP_Vect[RSPOpC.vd].u16(Index) = RSP_Vect[RSPOpC.vt].ue(Index, RSPOpC.e);
+    }
+    else
+    {
+        uint8_t del = EleSpec[RSPOpC.e].B[Index];
+        RSP_Vect[RSPOpC.vd].u16(7 - Index) = RSP_Vect[RSPOpC.vt].s16(7 - del);
+    }
 }
 
 void RSP_Vector_VRSQ(void)
@@ -2108,7 +2116,14 @@ void RSP_Vector_VNOOP(void)
 void RSP_Opcode_LBV(void)
 {
     uint32_t Address = (uint32_t)(RSP_GPR[RSPOpC.base].W + (RSPOpC.voffset << 0)) & 0xFFF;
-    RSP_Vect[RSPOpC.rt].s8(RSPOpC.del) = *(RSPInfo.DMEM + (Address ^ 3));
+    if (AccurateEmulation)
+    {
+        RSP_Vect[RSPOpC.rt].s8(RSPOpC.del) = *(RSPInfo.DMEM + (Address ^ 3));
+    }
+    else
+    {
+        RSP_Vect[RSPOpC.rt].s8(15 - RSPOpC.del) = *(RSPInfo.DMEM + (Address ^ 3));
+    }
 }
 
 void RSP_Opcode_LSV(void)
@@ -2117,7 +2132,14 @@ void RSP_Opcode_LSV(void)
     uint8_t Length = std::min((uint8_t)2, (uint8_t)(16 - RSPOpC.del));
     for (uint8_t i = RSPOpC.del, n = (uint8_t)(Length + RSPOpC.del); i < n; i++, Address++)
     {
-        RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        if (AccurateEmulation)
+        {
+            RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        }
+        else
+        {
+            RSP_Vect[RSPOpC.rt].s8(15 - i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        }
     }
 }
 
@@ -2127,18 +2149,31 @@ void RSP_Opcode_LLV(void)
     uint8_t Length = std::min((uint8_t)4, (uint8_t)(16 - RSPOpC.del));
     for (uint8_t i = RSPOpC.del, n = (uint8_t)(Length + RSPOpC.del); i < n; i++, Address++)
     {
-        RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        if (AccurateEmulation)
+        {
+            RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        }
+        else
+        {
+            RSP_Vect[RSPOpC.rt].s8(15 - i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        }
     }
 }
 
 void RSP_Opcode_LDV(void)
 {
     uint32_t Address = (uint32_t)(RSP_GPR[RSPOpC.base].W + (RSPOpC.voffset << 3)) & 0xFFF;
     uint8_t Length = std::min((uint8_t)8, (uint8_t)(16 - RSPOpC.del));
-    for (uint8_t i = RSPOpC.del, n = (uint8_t)(Length + RSPOpC.del); i < n; i++)
+    for (uint8_t i = RSPOpC.del, n = (uint8_t)(Length + RSPOpC.del); i < n; i++, Address++)
     {
-        RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
-        Address += 1;
+        if (AccurateEmulation)
+        {
+            RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        }
+        else
+        {
+            RSP_Vect[RSPOpC.rt].s8(15 - i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        }
     }
 }
 
@@ -2148,7 +2183,14 @@ void RSP_Opcode_LQV(void)
     uint8_t Length = std::min((uint8_t)(((Address + 0x10) & ~0xF) - Address), (uint8_t)(16 - RSPOpC.del));
     for (uint8_t i = RSPOpC.del, n = (uint8_t)(Length + RSPOpC.del); i < n; i++, Address++)
     {
-        RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + (Address ^ 3));
+        if (AccurateEmulation)
+        {
+            RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + (Address ^ 3));
+        }
+        else
+        {
+            RSP_Vect[RSPOpC.rt].s8(15 - i) = *(RSPInfo.DMEM + (Address ^ 3));
+        }
     }
 }
 
@@ -2159,7 +2201,14 @@ void RSP_Opcode_LRV(void)
     Address &= 0xFF0;
     for (uint8_t i = Offset; i < 16; i++, Address++)
     {
-        RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        if (AccurateEmulation)
+        {
+            RSP_Vect[RSPOpC.rt].s8(i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        }
+        else
+        {
+            RSP_Vect[RSPOpC.rt].s8(15 - i) = *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF));
+        }
     }
 }
 
@@ -2171,7 +2220,14 @@ void RSP_Opcode_LPV(void)
 
     for (uint8_t i = 0; i < 8; i++)
     {
-        RSP_Vect[RSPOpC.rt].s16(i) = *(RSPInfo.DMEM + ((Address + ((Offset + i) & 0xF) ^ 3) & 0xFFF)) << 8;
+        if (AccurateEmulation)
+        {
+            RSP_Vect[RSPOpC.rt].s16(i) = *(RSPInfo.DMEM + ((Address + ((Offset + i) & 0xF) ^ 3) & 0xFFF)) << 8;
+        }
+        else
+        {
+            RSP_Vect[RSPOpC.rt].s16(7 - i) = *(RSPInfo.DMEM + ((Address + ((Offset + i) & 0xF) ^ 3) & 0xFFF)) << 8;
+        }
     }
 }
 
@@ -2283,7 +2339,14 @@ void RSP_Opcode_SQV(void)
     uint8_t Length = (uint8_t)(((Address + 0x10) & ~0xF) - Address);
     for (uint8_t i = RSPOpC.del; i < (Length + RSPOpC.del); i++)
     {
-        *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = RSP_Vect[RSPOpC.rt].s8(i & 0xF);
+        if (AccurateEmulation)
+        {
+            *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = RSP_Vect[RSPOpC.rt].s8(i & 0xF);
+        }
+        else
+        {
+            *(RSPInfo.DMEM + ((Address ^ 3) & 0xFFF)) = RSP_Vect[RSPOpC.rt].s8(15 - (i & 0xF));
+        }
         Address += 1;
     }
 }

diff --git a/Source/Project64-rsp-core/cpu/RspTypes.cpp b/Source/Project64-rsp-core/cpu/RspTypes.cpp
@@ -1,4 +1,5 @@
 #include "RspTypes.h"
+#include <Project64-rsp-core/Settings/RspSettings.h>
 
 extern UDWORD EleSpec[16];
 
@@ -11,41 +12,41 @@ RSPVector::RSPVector()
 uint16_t & RSPVector::ue(uint8_t Index, uint8_t Element)
 {
     Index = EleSpec[Element].B[Index];
-    return ((uint16_t *)&m_Reg)[7 - Index];
+    return ((uint16_t *)&m_Reg)[AccurateEmulation ? 7 - Index : Index];
 }
 
 int16_t & RSPVector::se(uint8_t Index, uint8_t Element)
 {
     Index = EleSpec[Element].B[Index];
-    return ((int16_t *)&m_Reg)[7 - Index];
+    return ((int16_t *)&m_Reg)[AccurateEmulation ? 7 - Index : Index];
 }
 
 int8_t & RSPVector::s8(uint8_t Index)
 {
-    return ((int8_t *)&m_Reg)[15 - Index];
+    return ((int8_t *)&m_Reg)[AccurateEmulation ? 15 - Index : Index];
 }
 
 uint8_t & RSPVector::u8(uint8_t Index)
 {
-    return ((uint8_t *)&m_Reg)[15 - Index];
+    return ((uint8_t *)&m_Reg)[AccurateEmulation ? 15 - Index : Index];
 }
 
 int16_t & RSPVector::s16(uint8_t Index)
 {
-    return ((int16_t *)&m_Reg)[7 - Index];
+    return ((int16_t *)&m_Reg)[AccurateEmulation ? 7 - Index : Index];
 }
 
 uint16_t & RSPVector::u16(uint8_t Index)
 {
-    return ((uint16_t *)&m_Reg)[7 - Index];
+    return ((uint16_t *)&m_Reg)[AccurateEmulation ? 7 - Index : Index];
 }
 
 int32_t & RSPVector::s32(uint8_t Index)
 {
-    return ((int32_t *)&m_Reg)[3 - Index];
+    return ((int32_t *)&m_Reg)[AccurateEmulation ? 3 - Index : Index];
 }
 
 uint64_t & RSPVector::u64(uint8_t Index)
 {
-    return m_Reg[1 - Index];
+    return m_Reg[AccurateEmulation ? 1 - Index : Index];
 }