Flickering screen when passing ADL-N and RPL-P platforms #8432
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[External_System_ID] ACRN-10146 |
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The Data of Stolen Memory (DSM) region on Alder Lake-N and Raptor Lake platform is indicated by the BDSM register (0xC0 and 0xC4 in PCI config space), which is the same as Gen 11 (Tiger Lake) iGPU. This patch adds ADL-N and RPL iGPU device id to passthrough the DSM region properly when using GVT-d. The PCI device ids are taken from i915 kernel driver. Tracked-On: #8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
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Jul 14, 2023
The Data of Stolen Memory (DSM) region on Alder Lake-N and Raptor Lake platform is indicated by the BDSM register (C0h and C4h in PCI config space), which is the same as Gen 11 (Tiger Lake) iGPU. This patch adds ADL-N and RPL iGPU device id to passthrough the DSM region properly when using GVT-d. The PCI device ids are taken from i915 kernel driver. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
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Jul 14, 2023
This patch adjusts the existing PCI device ids for GVT-d DSM region passthrough to match the ids in i915 kernel driver and intel doc [1]. [1]: https://dgpu-docs.intel.com/devices/hardware-table.html Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
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Jul 14, 2023
Rocket Lake and Jasper Lake platforms uses Base Data of Stolen Memory (BDSM) register to indicate the stolen memory region. This region should be passthrough to guests when using GVT-d. The PCI device ids are taken from i915 kernel driver. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
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Reopen due to the solution/workaround is not merged in master |
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Jul 27, 2023
Since Intel Processor Graphics Gen11, Base Data of Stolen Memory (BDSM) register is extended to 64 bit, allowing BIOS to assign an above 4G address. This patch changes the type of hpa/gpa variables to uint64_t to properly handle such case. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
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Jul 27, 2023
The register index and data format of BDSM (Base Data of Stolen Memory) of Intel integrated graphics is changed in GPU Gen 11. Currently ACRN uses a long device list for Gen11+ devices. This patch introduces a new device allowlist for IGD passthrough in igd_pciids.h, covering IGD device ids from Skylake, and handles passthrough by its generation. If a device is not listed, it will be treated as a gen 11 device and a warning will be printed, developers should add the new device to the list if it is verified to work. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
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Jul 27, 2023
Currently the DSM (Data of Stolen Memory) size was hardcoded to 64M in ACRN, meaning that users must set "DVMT Pre-Allocated" to 64M in order to make IGD passthrough (GVT-d) to work. This patch reads the BIOS- configured memory size from GGC (GMCH Graphics Control, 0x50) register and passthrough corresponding area to guest. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
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Jul 27, 2023
The register index and data format of BDSM (Base Data of Stolen Memory) of Intel integrated graphics is changed in GPU Gen 11. Currently ACRN uses a long device list for Gen11+ devices. This patch introduces a new device allowlist for IGD passthrough in igd_pciids.h, covering IGD device ids from Skylake, and handles passthrough by its generation. If a device is not listed, it will be treated as a gen 11 device and a warning will be printed, developers should add the new device to the list if it is verified to work. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
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Jul 27, 2023
Currently the DSM (Data of Stolen Memory) size was hardcoded to 64M in ACRN, meaning that users must set "DVMT Pre-Allocated" to 64M in order to make IGD passthrough (GVT-d) to work. This patch reads the BIOS- configured memory size from GGC (GMCH Graphics Control, 0x50) register and passthrough corresponding area to guest. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
added a commit
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Jul 27, 2023
The register index and data format of BDSM (Base Data of Stolen Memory) of Intel integrated graphics is changed in GPU Gen 11. Currently ACRN uses a long device list for Gen11+ devices. This patch introduces a new device allowlist for IGD passthrough in igd_pciids.h, covering IGD device ids from Skylake, and handles passthrough by its generation. If a device is not listed, it will be treated as a gen 11 device and a warning will be printed, developers should add the new device to the list if it is verified to work. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
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Jul 27, 2023
Currently the DSM (Data of Stolen Memory) size was hardcoded to 64M in ACRN, meaning that users must set "DVMT Pre-Allocated" to 64M in order to make IGD passthrough (GVT-d) to work. This patch reads the BIOS- configured memory size from GGC (GMCH Graphics Control, 0x50) register and passthrough corresponding area to guest. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
added a commit
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Jul 27, 2023
The register index and data format of BDSM (Base Data of Stolen Memory) of Intel integrated graphics is changed in GPU Gen 11. Currently ACRN uses a long device list for Gen11+ devices. This patch introduces a new device allowlist for IGD passthrough in igd_pciids.h, covering IGD device ids from Skylake, and handles passthrough by its generation. If a device is not listed, it will be treated as a gen 11 device and a warning will be printed, developers should add the new device to the list if it is verified to work. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
added a commit
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Jul 27, 2023
Currently the DSM (Data of Stolen Memory) size was hardcoded to 64M in ACRN, meaning that users must set "DVMT Pre-Allocated" to 64M in order to make IGD passthrough (GVT-d) to work. This patch reads the BIOS- configured memory size from GGC (GMCH Graphics Control, 0x50) register and passthrough corresponding area to guest. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
acrnsi-robot
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Jul 27, 2023
Since Intel Processor Graphics Gen11, Base Data of Stolen Memory (BDSM) register is extended to 64 bit, allowing BIOS to assign an above 4G address. This patch changes the type of hpa/gpa variables to uint64_t to properly handle such case. Tracked-On: #8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
acrnsi-robot
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that referenced
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Jul 27, 2023
The register index and data format of BDSM (Base Data of Stolen Memory) of Intel integrated graphics is changed in GPU Gen 11. Currently ACRN uses a long device list for Gen11+ devices. This patch introduces a new device allowlist for IGD passthrough in igd_pciids.h, covering IGD device ids from Skylake, and handles passthrough by its generation. If a device is not listed, it will be treated as a gen 11 device and a warning will be printed, developers should add the new device to the list if it is verified to work. Tracked-On: #8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
acrnsi-robot
pushed a commit
that referenced
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Jul 27, 2023
Currently the DSM (Data of Stolen Memory) size was hardcoded to 64M in ACRN, meaning that users must set "DVMT Pre-Allocated" to 64M in order to make IGD passthrough (GVT-d) to work. This patch reads the BIOS- configured memory size from GGC (GMCH Graphics Control, 0x50) register and passthrough corresponding area to guest. Tracked-On: #8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
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Aug 30, 2023
Since Intel Processor Graphics Gen11, Base Data of Stolen Memory (BDSM) register is extended to 64 bit, allowing BIOS to assign an above 4G address. This patch changes the type of hpa/gpa variables to uint64_t to properly handle such case. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
added a commit
to jiaqingz-intel/acrn-hypervisor
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this issue
Aug 30, 2023
The register index and data format of BDSM (Base Data of Stolen Memory) of Intel integrated graphics is changed in GPU Gen 11. Currently ACRN uses a long device list for Gen11+ devices. This patch introduces a new device allowlist for IGD passthrough in igd_pciids.h, covering IGD device ids from Skylake, and handles passthrough by its generation. If a device is not listed, it will be treated as a gen 11 device and a warning will be printed, developers should add the new device to the list if it is verified to work. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
jiaqingz-intel
added a commit
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Aug 30, 2023
Currently the DSM (Data of Stolen Memory) size was hardcoded to 64M in ACRN, meaning that users must set "DVMT Pre-Allocated" to 64M in order to make IGD passthrough (GVT-d) to work. This patch reads the BIOS- configured memory size from GGC (GMCH Graphics Control, 0x50) register and passthrough corresponding area to guest. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
izhouwu
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Jan 19, 2024
Since Intel Processor Graphics Gen11, Base Data of Stolen Memory (BDSM) register is extended to 64 bit, allowing BIOS to assign an above 4G address. This patch changes the type of hpa/gpa variables to uint64_t to properly handle such case. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
izhouwu
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Jan 19, 2024
The register index and data format of BDSM (Base Data of Stolen Memory) of Intel integrated graphics is changed in GPU Gen 11. Currently ACRN uses a long device list for Gen11+ devices. This patch introduces a new device allowlist for IGD passthrough in igd_pciids.h, covering IGD device ids from Skylake, and handles passthrough by its generation. If a device is not listed, it will be treated as a gen 11 device and a warning will be printed, developers should add the new device to the list if it is verified to work. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
izhouwu
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Jan 19, 2024
Currently the DSM (Data of Stolen Memory) size was hardcoded to 64M in ACRN, meaning that users must set "DVMT Pre-Allocated" to 64M in order to make IGD passthrough (GVT-d) to work. This patch reads the BIOS- configured memory size from GGC (GMCH Graphics Control, 0x50) register and passthrough corresponding area to guest. Tracked-On: projectacrn#8432 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
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Black screen or flickering screen when passing ADL-N and RPL-P platforms
And kernel i915 driver reports error with
ERROR Fault errors on pipe A: 0x00000080The text was updated successfully, but these errors were encountered: