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MISRA C compliance #861
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[External_System_ID] ACRN-2129 |
hwang37
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area: hypervisor
priority: high
status: open
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Aug 7, 2018
shiqingg
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Aug 15, 2018
MISRA-C requires that shift operation cannot exceed the word length. What this patch does: - Fix the bug in 'vuart_init' The register 'dll' and 'dlh' should be uint8_t rather than char. 'dll' is the lower 8-bit of divisor. 'dlh' is the higher 8-bit of divisor. So, the shift value should be 8U rather than 16U. - Fix other data type issues regarding to the registers in 'struct vuart' The registers should be unsigned variables. v1 -> v2: * Use a local variable 'uint8_t value_u8 = (uint8_t)value' to avoid mutiple times type conversion * Use '(uint8_t)divisor' rather than '(uint8_t)(divisor & 0xFFU)' to get the lower 8 bit of 'divisor' Direct type conversion is safe and simple per Xiangyang's suggestion. Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
lijinxia
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Aug 16, 2018
MISRA-C requires that shift operation cannot exceed the word length. What this patch does: - Fix the bug in 'vuart_init' The register 'dll' and 'dlh' should be uint8_t rather than char. 'dll' is the lower 8-bit of divisor. 'dlh' is the higher 8-bit of divisor. So, the shift value should be 8U rather than 16U. - Fix other data type issues regarding to the registers in 'struct vuart' The registers should be unsigned variables. v1 -> v2: * Use a local variable 'uint8_t value_u8 = (uint8_t)value' to avoid mutiple times type conversion * Use '(uint8_t)divisor' rather than '(uint8_t)(divisor & 0xFFU)' to get the lower 8 bit of 'divisor' Direct type conversion is safe and simple per Xiangyang's suggestion. Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
shiqingg
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Aug 17, 2018
- Fix the data type violations based on MISRA-C requirements - Add '-fsigned-char' in Makefile to let the compiler treats 'char' be signed, like 'signed char'. Otherwise, the static checker treats 'char', 'signed char' and 'unsigned char' as three different types. - Fix some minor coding style issues, such as TAB issues, line over 80 characters issues and comments style v1 -> v2: * fix the violation regarding to 'fifo_getchar' Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
lijinxia
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Aug 17, 2018
- Fix the data type violations based on MISRA-C requirements - Add '-fsigned-char' in Makefile to let the compiler treats 'char' be signed, like 'signed char'. Otherwise, the static checker treats 'char', 'signed char' and 'unsigned char' as three different types. - Fix some minor coding style issues, such as TAB issues, line over 80 characters issues and comments style v1 -> v2: * fix the violation regarding to 'fifo_getchar' Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
shiqingg
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Aug 21, 2018
Fix the parameter type mismatch between API declaration and definition. Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
shiqingg
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Aug 21, 2018
Use func(void) rather than func() for the function declaration and definition based on MISRAC requirement. Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
lijinxia
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Aug 21, 2018
Fix the parameter type mismatch between API declaration and definition. Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
lijinxia
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Aug 21, 2018
Use func(void) rather than func() for the function declaration and definition based on MISRAC requirement. Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
shiqingg
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Aug 21, 2018
MISRAC requires that the array size should be declared explicitly. This patch fixes the issues caused by vm0_boot_context. Fix pattern is like below: extern char start_of_ROM, end_of_ROM, start_of_FLASH; memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - & start_of_ROM); Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
lijinxia
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Aug 21, 2018
MISRAC requires that the array size should be declared explicitly. This patch fixes the issues caused by vm0_boot_context. Fix pattern is like below: extern char start_of_ROM, end_of_ROM, start_of_FLASH; memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - & start_of_ROM); Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
shiqingg
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Aug 22, 2018
Remove the functions without definition. Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
shiqingg
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Aug 22, 2018
- Clean up some code regarding to % and / operations since bit operations are faster. x % 64U ---> x & 0x3fU x % 32U ---> x & 0x1fU x % 16U ---> x & 0xfU x % 8U ---> x & 0x7U x % 4U ---> x & 0x3U x % 2U ---> x & 0x1U x / 64U ---> x >> 6U x / 32U ---> x >> 5U x / 16U ---> x >> 4U x / 8U ---> x >> 3U x / 4U ---> x >> 2U x / 2U ---> x >> 1U - Minor changes regarding to coding styles Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
lijinxia
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Aug 22, 2018
Remove the functions without definition. Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
lijinxia
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Aug 22, 2018
- Clean up some code regarding to % and / operations since bit operations are faster. x % 64U ---> x & 0x3fU x % 32U ---> x & 0x1fU x % 16U ---> x & 0xfU x % 8U ---> x & 0x7U x % 4U ---> x & 0x3U x % 2U ---> x & 0x1U x / 64U ---> x >> 6U x / 32U ---> x >> 5U x / 16U ---> x >> 4U x / 8U ---> x >> 3U x / 4U ---> x >> 2U x / 2U ---> x >> 1U - Minor changes regarding to coding styles Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
shiqingg
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Aug 24, 2018
This patch fixes the following issues: - No newline after semi colon. - No space after semi colon in for expression. - No space between if, while, for and expresn. Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
yakuizhao
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Nov 25, 2019
Change the type from uint8_t to uint32_t for interrupt pin Tracked-On: projectacrn/acrn-hypervisor#861 Change-Id: Ifcd64388a99c810fa30f0270b087c4c6e3d1af07 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Tracked-On: PKT-1696
yakuizhao
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Nov 28, 2019
ASSERT/DEASSERT/PULSE IRQ line ioctl commands will be deprecated. Tracked-On: projectacrn/acrn-hypervisor#861 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com> Reviewed-by: Fei Li <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
yakuizhao
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Nov 28, 2019
Change the type from uint8_t to uint32_t for interrupt pin Tracked-On: projectacrn/acrn-hypervisor#861 Change-Id: Ifcd64388a99c810fa30f0270b087c4c6e3d1af07 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Tracked-On: PKT-1696
sys-oak
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Dec 6, 2019
ASSERT/DEASSERT/PULSE IRQ line ioctl commands will be deprecated. Tracked-On: projectacrn/acrn-hypervisor#861 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com> Reviewed-by: Fei Li <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
sys-oak
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Dec 6, 2019
Change the type from uint8_t to uint32_t for interrupt pin Tracked-On: projectacrn/acrn-hypervisor#861 Change-Id: Ifcd64388a99c810fa30f0270b087c4c6e3d1af07 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Tracked-On: PKT-1696
finomeng
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Mar 5, 2020
ASSERT/DEASSERT/PULSE IRQ line ioctl commands will be deprecated. Tracked-On: projectacrn/acrn-hypervisor#861 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com> Reviewed-by: Fei Li <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
finomeng
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Mar 5, 2020
below IOCTLs are wrapped into IC_SET_IRQLINE: - IC_ASSERT_IRQLINE - IC_DEASSERT_IRQLINE - IC_PULSE_IRQLINE Tracked-On: projectacrn/acrn-hypervisor#861 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
finomeng
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Mar 5, 2020
Change the type from uint8_t to uint32_t for interrupt pin Tracked-On: projectacrn/acrn-hypervisor#861 Change-Id: Ifcd64388a99c810fa30f0270b087c4c6e3d1af07 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Tracked-On: PKT-1696
mingqiangchi
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Mar 10, 2020
rename: ioapic_get_gsi_irq_addr --> gsi_to_ioapic_base ioapic_addr -->ioapic_base Tracked-On: projectacrn#861 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
dongyaozu
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Mar 11, 2020
rename: ioapic_get_gsi_irq_addr --> gsi_to_ioapic_base ioapic_addr -->ioapic_base Tracked-On: #861 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
ghost
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Mar 30, 2020
yonghuah
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Apr 16, 2020
This patch wrapps a common function to initialize physical CPU for the second phase to reduce redundant code. Tracked-On: projectacrn#861 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
wenlingz
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Apr 16, 2020
This patch wrapps a common function to initialize physical CPU for the second phase to reduce redundant code. Tracked-On: #861 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
shiqingg
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Nov 27, 2020
While following two styles are both correct, the 2nd one is simpler. bool is_level_triggered; 1. if (is_level_triggered == true) {...} 2. if (is_level_triggered) {...} This patch cleans up the style in hypervisor. Tracked-On: projectacrn#861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
wenlingz
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Nov 28, 2020
While following two styles are both correct, the 2nd one is simpler. bool is_level_triggered; 1. if (is_level_triggered == true) {...} 2. if (is_level_triggered) {...} This patch cleans up the style in hypervisor. Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Closed with no regression issues. |
shiqingg
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Jul 2, 2024
Commit `512c98fd7 hv: trace: show cpu usage of vms in pcpu sharing case` causes the compilation error in release mode: hypervisor/common/schedule.c:190: undefined reference to `TRACE_16STR' This patch fixes this issue. Tracked-On: projectacrn#861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
acrnsi-robot
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Jul 3, 2024
Commit `512c98fd7 hv: trace: show cpu usage of vms in pcpu sharing case` causes the compilation error in release mode: hypervisor/common/schedule.c:190: undefined reference to `TRACE_16STR' This patch fixes this issue. Tracked-On: #861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
shiqingg
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Jul 3, 2024
elf64_r_type() is only invoked when CONFIG_RELOC is defined. This patch encloses its definition with `#ifdef CONFIG_RELOC`, otherwise, it is dead code. Tracked-On: projectacrn#861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
shiqingg
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Jul 3, 2024
This patch fixes the following error: error: variable 'sid' is used uninitialized whenever 'if' condition is true [-Werror,-Wsometimes-uninitialized] Tracked-On: projectacrn#861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
shiqingg
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Jul 3, 2024
rtc_halted() is not invoked anywhere in the code. This patch fixes below error by tagging this function with the `__unused` attribute. error: unused function 'rtc_halted' [-Werror,-Wunused-function] Tracked-On: projectacrn#861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
shiqingg
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Jul 3, 2024
rtc_halted() is not invoked anywhere in the code. This patch removes this unused function to fix below error. error: unused function 'rtc_halted' [-Werror,-Wunused-function] Tracked-On: projectacrn#861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
acrnsi-robot
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Jul 3, 2024
elf64_r_type() is only invoked when CONFIG_RELOC is defined. This patch encloses its definition with `#ifdef CONFIG_RELOC`, otherwise, it is dead code. Tracked-On: #861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
acrnsi-robot
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Jul 3, 2024
This patch fixes the following error: error: variable 'sid' is used uninitialized whenever 'if' condition is true [-Werror,-Wsometimes-uninitialized] Tracked-On: #861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
acrnsi-robot
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Jul 3, 2024
rtc_halted() is not invoked anywhere in the code. This patch removes this unused function to fix below error. error: unused function 'rtc_halted' [-Werror,-Wunused-function] Tracked-On: #861 Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
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ACRN code should support MISRA C compliance coding style.
Note: MISRA-C is a standard guideline for Safety Critical Software.
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