Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

feature request: MIPS interAptiv CPU emulation #76

Open
lalrae opened this issue Jan 22, 2016 · 0 comments
Open

feature request: MIPS interAptiv CPU emulation #76

lalrae opened this issue Jan 22, 2016 · 0 comments

Comments

@lalrae
Copy link

lalrae commented Jan 22, 2016

Implement missing features in QEMU to emulate interAptiv Processor Core: https://imgtec.com/mips/aptiv/interaptiv/

  • Inter-Thread Communication Unit
  • Improve MT-ASE emulation - existing implementation has issues (some places in code assume max 2 VPEs) and is incomplete. Latest SMP kernel running on 34Kf QEMU with 2 VPEs is unstable and slow.
  • Implement Enhanced Virtual Addressing
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

1 participant