uncached volatile writes not respected if write buffer not yet drained

[jrrk]

I have an encountered an issue where Ariane appears to return the value from the write buffer (or perhaps the cache?) in the case of a volatile uncached write, rather than the fresh value from IO memory. This is important for peripherals such as the UART where reads and writes to the same address go to different physical FIFOs. A possible workaround would be to offset the addresses of such peripherals when reading, taking advantage of don't care bits in the address. However this means changes to driver source code, which to some extent nullifies the benefit of emulating a standard interface in the first place. issuing a fence instruction in between the write and the read solves the problem at the expense of performance. I am using the master commit of Ariane with one change: DCACHE_SET_ASSOC=4

[zarubaf]

Okay. I think what you say makes a lot of sense. So essentially it seems that the cache potentially serves reads from the non-cacheable region from its write-buffer. That would be indeed wrong behavior. For a quick SW fix, I agree that using a fence would be the appropriate action. For the real HW fix I need to look deeper into the cache logic. Thanks for pointing that out and digging up the issue.