cortex-m: reset_halt: just warn about invalid T-bit, don't automatically fix #1559
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Also fixed some type errors.
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PyOCD previously would automatically fix an invalid (cleared)
XPSR.Tbit after a halting reset. This might be useful in some cases, and some debuggers like Segger J-Link will do this. But the actual value is questionable, since the user still needs to address the root cause such as fixing the vector table.Thus, this PR changes it so that pyocd only logs a warning if the T-bit is cleared after a halting reset. The core will likely go immediately into lockup as soon as it is resumed.
Also fixed some type errors.