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Add AVX512 support in ATen & remove AVX support #56992
Commits on Apr 27, 2021
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Rename namespace vec256 to vec
sanchit committedApr 27, 2021 Configuration menu - View commit details
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Commits on Apr 30, 2021
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Commits on May 10, 2021
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Revert "hadd and hsub implemented with permutes"
This reverts commit b42dda4.
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Commits on May 13, 2021
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Fix newlines & Clang compilation errors
sanchit committedMay 13, 2021 Configuration menu - View commit details
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Merge branch 'master' of https://github.com/pytorch/pytorch into only…
…_vec
sanchit committedMay 13, 2021 Configuration menu - View commit details
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Commits on May 16, 2021
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Add
CPU capability usage
string for AVX512Otherwise, it'd be an empty string
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Just checking if
-mno-avx512f
flag would help hereNot sure from where AVX512 code is getting into AVX2 code.
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Commits on May 17, 2021
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Fix silent-duplicate-symbol-resolution of ATen symbols
ATen kernels are compiled once for each vectorization level. Since they have the same symbol-names, the linker can make the entire library use the version it finds first. # Thus we organize the input files in the following order: 1. All files with no AVX support 2. All files with AVX support (conveniently, they all have names ending with 'AVX.cpp') 3. All files with AVX2 support ('*AVX2.cpp') 4. # 3. All files with AVX512 support ('*AVX512.cpp')
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[skip ci] Get latest commits from the main repo
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Commits on May 18, 2021
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Commits on May 19, 2021
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Commits on May 21, 2021
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Revert hsub_ps & hadd_ps but remove post-hsub/hadd permutes
[skip ci] Permutes after `hadd` & `hsub` weren't required. Since float `hsub` & `hadd` aren't used elsewhere, we can rename them to signify that it's different from the `hsub` & `hadd` of intrinsics. However, double `hsub` & `hadd` directly correspond to their respective intrinsics namesakes.
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Commits on May 25, 2021
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[skip ci] Remaining failures - test_float_domains_log1p_cpu_bfloat16, test_reference_numerics_extremal_cos_cpu_bfloat16, test_reference_numerics_extremal_sin_cpu_bfloat16, test_reference_numerics_extremal_tanh_cpu_bfloat16
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Make vec512_float.h parallel to vec512_double.h
[skip ci] Had forgotten to fix min & max for float. Made its implementation similar to what I did in vec512_double.h.
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Rename
reduction128
tovectorized_reduction
[skip ci] Reduce.h had hard-coded values for AVX2
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Commits on May 26, 2021
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Sum
kernel requiresilp_factor
2 for AVX512While I'm only adding this change for `ilp_factor`, I get the same results as AVX2, when I conditionally changed hard-coded 4s to 2s. [skip ci]
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Add AVX512 code to quantized kernels.
[skip ci] Apart from adding AVX512 support to some kernels, some hard-coded values in kernels were made generic. `qadaptive_avg_pool2d_nhwc_kernel` & `qavg_pool2d_nhwc_kernel` couldn't be enabled for AVX512, as the existing implementation is specifically for AVX2, so I'd have to understand the code deeply.
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Commits on May 27, 2021
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Fix compilation error for the ROCm build
[skip ci] Only ROCm build will run. I'm also using g++ 9.3, but I didn't encounter any issue. Perhaps I need to pull changes locally
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[Temporary] Test AVX512 kernels on CI for more potential failures
CI checks that are tests use 'large' resource_class, which are assigned to older machines without AVX2. 'xlarge' resource_class has AVX512 support, so temporarily modifying config to test for more failures on Linux
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Commits on May 28, 2021
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Commits on Jun 22, 2021
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Disabled AVX512 kernels for sum & nansum, created GHA for pytorch-lin…
…ux-bionic-py3.8-gcc9-coverage
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Commits on Jun 30, 2021
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[SKIP CI] [SKIP-CI] Had forgotten to change line after removing some …
…flags Co-authored-by: Nikita Shulga <nikita.shulga@gmail.com>
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Remove
CPU_CAPABILITY_AVX2
from vec512_base.h[SKIP CI] [skip-ci] Co-authored-by: Nikita Shulga <nikita.shulga@gmail.com>
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[skip-ci] [skip ci] Co-authored-by: Nikita Shulga <nikita.shulga@gmail.com>
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Make duplicate comment concise by referring to the original copy
[skip ci] [skip-ci] Co-authored-by: Nikita Shulga <nikita.shulga@gmail.com>
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[skip-ci] [skip ci] Co-authored-by: Nikita Shulga <nikita.shulga@gmail.com>
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