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hw/arm/virt: use VirtMachineState.gic_version
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machvirt_init may need to probe for the gic version. If so, then
make sure the result is written to VirtMachineState. With the
state up to date, use it instead of a local variable. This is a
cleanup that prepares for VirtMachineState to be passed to functions
even outside hw/arm/virt.c

Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-id: 20170102200153.28864-7-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@pm215
Andrew Jones authored and pm215 committed Jan 9, 2017
1 parent 0127937 commit 055a7f2
Showing 1 changed file with 17 additions and 18 deletions.
35 changes: 17 additions & 18 deletions hw/arm/virt.c
View file
Expand Up @@ -308,7 +308,7 @@ static void fdt_add_psci_node(const VirtMachineState *vms)
qemu_fdt_setprop_cell(fdt, "/psci", "migrate", migrate_fn);
}

static void fdt_add_timer_nodes(const VirtMachineState *vms, int gictype)
static void fdt_add_timer_nodes(const VirtMachineState *vms)
{
/* On real hardware these interrupts are level-triggered.
* On KVM they were edge-triggered before host kernel version 4.4,
Expand Down Expand Up @@ -336,7 +336,7 @@ static void fdt_add_timer_nodes(const VirtMachineState *vms, int gictype)
irqflags = GIC_FDT_IRQ_FLAGS_EDGE_LO_HI;
}

if (gictype == 2) {
if (vms->gic_version == 2) {
irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
GIC_FDT_IRQ_PPI_CPU_WIDTH,
(1 << vms->smp_cpus) - 1);
Expand Down Expand Up @@ -450,7 +450,7 @@ static void fdt_add_v2m_gic_node(VirtMachineState *vms)
qemu_fdt_setprop_cell(vms->fdt, "/intc/v2m", "phandle", vms->msi_phandle);
}

static void fdt_add_gic_node(VirtMachineState *vms, int type)
static void fdt_add_gic_node(VirtMachineState *vms)
{
vms->gic_phandle = qemu_fdt_alloc_phandle(vms->fdt);
qemu_fdt_setprop_cell(vms->fdt, "/", "interrupt-parent", vms->gic_phandle);
Expand All @@ -461,7 +461,7 @@ static void fdt_add_gic_node(VirtMachineState *vms, int type)
qemu_fdt_setprop_cell(vms->fdt, "/intc", "#address-cells", 0x2);
qemu_fdt_setprop_cell(vms->fdt, "/intc", "#size-cells", 0x2);
qemu_fdt_setprop(vms->fdt, "/intc", "ranges", NULL, 0);
if (type == 3) {
if (vms->gic_version == 3) {
qemu_fdt_setprop_string(vms->fdt, "/intc", "compatible",
"arm,gic-v3");
qemu_fdt_setprop_sized_cells(vms->fdt, "/intc", "reg",
Expand All @@ -483,7 +483,7 @@ static void fdt_add_gic_node(VirtMachineState *vms, int type)
qemu_fdt_setprop_cell(vms->fdt, "/intc", "phandle", vms->gic_phandle);
}

static void fdt_add_pmu_nodes(const VirtMachineState *vms, int gictype)
static void fdt_add_pmu_nodes(const VirtMachineState *vms)
{
CPUState *cpu;
ARMCPU *armcpu;
Expand All @@ -497,7 +497,7 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms, int gictype)
}
}

if (gictype == 2) {
if (vms->gic_version == 2) {
irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
GIC_FDT_IRQ_PPI_CPU_WIDTH,
(1 << vms->smp_cpus) - 1);
Expand Down Expand Up @@ -553,14 +553,14 @@ static void create_v2m(VirtMachineState *vms, qemu_irq *pic)
fdt_add_v2m_gic_node(vms);
}

static void create_gic(VirtMachineState *vms, qemu_irq *pic, int type)
static void create_gic(VirtMachineState *vms, qemu_irq *pic)
{
/* We create a standalone GIC */
VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
DeviceState *gicdev;
SysBusDevice *gicbusdev;
const char *gictype;
int i;
int type = vms->gic_version, i;

gictype = (type == 3) ? gicv3_class_name() : gic_class_name();

Expand Down Expand Up @@ -616,7 +616,7 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic, int type)
pic[i] = qdev_get_gpio_in(gicdev, i);
}

fdt_add_gic_node(vms, type);
fdt_add_gic_node(vms);

if (type == 3 && !vmc->no_its) {
create_its(vms, gicdev);
Expand Down Expand Up @@ -1212,7 +1212,6 @@ static void machvirt_init(MachineState *machine)
qemu_irq pic[NUM_IRQS];
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *secure_sysmem = NULL;
int gic_version = vms->gic_version;
int n, virt_max_cpus;
MemoryRegion *ram = g_new(MemoryRegion, 1);
const char *cpu_model = machine->cpu_model;
Expand All @@ -1233,14 +1232,14 @@ static void machvirt_init(MachineState *machine)
/* We can probe only here because during property set
* KVM is not available yet
*/
if (!gic_version) {
if (!vms->gic_version) {
if (!kvm_enabled()) {
error_report("gic-version=host requires KVM");
exit(1);
}

gic_version = kvm_arm_vgic_probe();
if (!gic_version) {
vms->gic_version = kvm_arm_vgic_probe();
if (!vms->gic_version) {
error_report("Unable to determine GIC version supported by host");
exit(1);
}
Expand All @@ -1266,7 +1265,7 @@ static void machvirt_init(MachineState *machine)
/* The maximum number of CPUs depends on the GIC version, or on how
* many redistributors we can fit into the memory map.
*/
if (gic_version == 3) {
if (vms->gic_version == 3) {
virt_max_cpus = vms->memmap[VIRT_GIC_REDIST].size / 0x20000;
clustersz = GICV3_TARGETLIST_BITS;
} else {
Expand Down Expand Up @@ -1373,7 +1372,7 @@ static void machvirt_init(MachineState *machine)

object_property_set_bool(cpuobj, true, "realized", NULL);
}
fdt_add_timer_nodes(vms, gic_version);
fdt_add_timer_nodes(vms);
fdt_add_cpu_nodes(vms);
fdt_add_psci_node(vms);

Expand All @@ -1383,9 +1382,9 @@ static void machvirt_init(MachineState *machine)

create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);

create_gic(vms, pic, gic_version);
create_gic(vms, pic);

fdt_add_pmu_nodes(vms, gic_version);
fdt_add_pmu_nodes(vms);

create_uart(vms, pic, VIRT_UART, sysmem, serial_hds[0]);

Expand Down Expand Up @@ -1414,7 +1413,7 @@ static void machvirt_init(MachineState *machine)
guest_info->memmap = vms->memmap;
guest_info->irqmap = vms->irqmap;
guest_info->use_highmem = vms->highmem;
guest_info->gic_version = gic_version;
guest_info->gic_version = vms->gic_version;
guest_info->no_its = vmc->no_its;
guest_info_state->machine_done.notify = virt_guest_info_machine_done;
qemu_add_machine_init_done_notifier(&guest_info_state->machine_done);
Expand Down

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