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Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' i…
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…nto staging

# gpg: Signature made Fri May 22 20:58:44 2015 BST using RSA key ID AAFC390E
# gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: FAEB 9711 A12C F475 812F  18F2 88A9 064D 1835 61EB
#      Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76  CBD0 7DEF 8106 AAFC 390E

* remotes/jnsnow/tags/ide-pull-request:
  ahci: do not remap clb/fis unconditionally
  macio: move unaligned DMA write code into separate pmac_dma_write() function
  macio: move unaligned DMA read code into separate pmac_dma_read() function
  qtest: pre-buffer hex nibs
  libqos/ahci: Swap memread/write with bufread/write
  qtest: add memset to qtest protocol
  qtest: Add base64 encoded read/write
  qtest: allow arbitrarily long sends
  qtest/ahci: add migrate halted dma test
  qtest/ahci: add halted dma test
  qtest/ahci: add flush migrate test
  qtest/ahci: add migrate dma test
  qtest/ahci: Add migration test
  ich9/ahci: Enable Migration
  libqos: Add migration helpers
  libqos/ahci: Fix sector set method
  libqos/ahci: Add halted command helpers
  glib: remove stale compat functions
  configure: require glib 2.22

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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pm215 committed May 26, 2015
2 parents 0d2ed60 + cd6cb73 commit 0915aed
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Showing 16 changed files with 1,031 additions and 359 deletions.
7 changes: 1 addition & 6 deletions configure
Expand Up @@ -2779,12 +2779,7 @@ fi
##########################################
# glib support probe

if test "$mingw32" = yes; then
# g_poll is required in order to integrate with the glib main loop.
glib_req_ver=2.20
else
glib_req_ver=2.12
fi
glib_req_ver=2.22
glib_modules=gthread-2.0
if test "$modules" = yes; then
glib_modules="$glib_modules gmodule-2.0"
Expand Down
89 changes: 63 additions & 26 deletions hw/ide/ahci.c
Expand Up @@ -198,6 +198,61 @@ static void map_page(AddressSpace *as, uint8_t **ptr, uint64_t addr,
}
}

/**
* Check the cmd register to see if we should start or stop
* the DMA or FIS RX engines.
*
* @ad: Device to engage.
* @allow_stop: Allow device to transition from started to stopped?
* 'no' is useful for migration post_load, which does not expect a transition.
*
* @return 0 on success, -1 on error.
*/
static int ahci_cond_start_engines(AHCIDevice *ad, bool allow_stop)
{
AHCIPortRegs *pr = &ad->port_regs;

if (pr->cmd & PORT_CMD_START) {
if (ahci_map_clb_address(ad)) {
pr->cmd |= PORT_CMD_LIST_ON;
} else {
error_report("AHCI: Failed to start DMA engine: "
"bad command list buffer address");
return -1;
}
} else if (pr->cmd & PORT_CMD_LIST_ON) {
if (allow_stop) {
ahci_unmap_clb_address(ad);
pr->cmd = pr->cmd & ~(PORT_CMD_LIST_ON);
} else {
error_report("AHCI: DMA engine should be off, "
"but appears to still be running");
return -1;
}
}

if (pr->cmd & PORT_CMD_FIS_RX) {
if (ahci_map_fis_address(ad)) {
pr->cmd |= PORT_CMD_FIS_ON;
} else {
error_report("AHCI: Failed to start FIS receive engine: "
"bad FIS receive buffer address");
return -1;
}
} else if (pr->cmd & PORT_CMD_FIS_ON) {
if (allow_stop) {
ahci_unmap_fis_address(ad);
pr->cmd = pr->cmd & ~(PORT_CMD_FIS_ON);
} else {
error_report("AHCI: FIS receive engine should be off, "
"but appears to still be running");
return -1;
}
}

return 0;
}

static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val)
{
AHCIPortRegs *pr = &s->dev[port].port_regs;
Expand Down Expand Up @@ -229,29 +284,8 @@ static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val)
* including LIST_ON and FIS_ON. */
pr->cmd = (pr->cmd & PORT_CMD_RO_MASK) | (val & ~PORT_CMD_RO_MASK);

if (pr->cmd & PORT_CMD_START) {
if (ahci_map_clb_address(&s->dev[port])) {
pr->cmd |= PORT_CMD_LIST_ON;
} else {
error_report("AHCI: Failed to start DMA engine: "
"bad command list buffer address");
}
} else if (pr->cmd & PORT_CMD_LIST_ON) {
ahci_unmap_clb_address(&s->dev[port]);
pr->cmd = pr->cmd & ~(PORT_CMD_LIST_ON);
}

if (pr->cmd & PORT_CMD_FIS_RX) {
if (ahci_map_fis_address(&s->dev[port])) {
pr->cmd |= PORT_CMD_FIS_ON;
} else {
error_report("AHCI: Failed to start FIS receive engine: "
"bad FIS receive buffer address");
}
} else if (pr->cmd & PORT_CMD_FIS_ON) {
ahci_unmap_fis_address(&s->dev[port]);
pr->cmd = pr->cmd & ~(PORT_CMD_FIS_ON);
}
/* Check FIS RX and CLB engines, allow transition to false: */
ahci_cond_start_engines(&s->dev[port], true);

/* XXX usually the FIS would be pending on the bus here and
issuing deferred until the OS enables FIS receival.
Expand Down Expand Up @@ -1404,8 +1438,12 @@ static int ahci_state_post_load(void *opaque, int version_id)
for (i = 0; i < s->ports; i++) {
ad = &s->dev[i];

ahci_map_clb_address(ad);
ahci_map_fis_address(ad);
/* Only remap the CLB address if appropriate, disallowing a state
* transition from 'on' to 'off' it should be consistent here. */
if (ahci_cond_start_engines(ad, false) != 0) {
return -1;
}

/*
* If an error is present, ad->busy_slot will be valid and not -1.
* In this case, an operation is waiting to resume and will re-check
Expand Down Expand Up @@ -1461,7 +1499,6 @@ typedef struct SysbusAHCIState {

static const VMStateDescription vmstate_sysbus_ahci = {
.name = "sysbus-ahci",
.unmigratable = 1, /* Still buggy under I/O load */
.fields = (VMStateField[]) {
VMSTATE_AHCI(ahci, SysbusAHCIState),
VMSTATE_END_OF_LIST()
Expand Down
1 change: 0 additions & 1 deletion hw/ide/ich.c
Expand Up @@ -82,7 +82,6 @@

static const VMStateDescription vmstate_ich9_ahci = {
.name = "ich9_ahci",
.unmigratable = 1, /* Still buggy under I/O load */
.version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_PCI_DEVICE(parent_obj, AHCIPCIState),
Expand Down

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