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target/rx: Use tcg_gen_ext_i32
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Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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rth7680 committed Oct 22, 2023
1 parent 443025e commit 0d67249
Showing 1 changed file with 3 additions and 8 deletions.
11 changes: 3 additions & 8 deletions target/rx/translate.c
Original file line number Diff line number Diff line change
Expand Up @@ -492,13 +492,11 @@ static bool trans_MOV_ra(DisasContext *ctx, arg_MOV_ra *a)
/* mov.<bwl> rs,rd */
static bool trans_MOV_mm(DisasContext *ctx, arg_MOV_mm *a)
{
static void (* const mov[])(TCGv ret, TCGv arg) = {
tcg_gen_ext8s_i32, tcg_gen_ext16s_i32, tcg_gen_mov_i32,
};
TCGv tmp, mem, addr;

if (a->lds == 3 && a->ldd == 3) {
/* mov.<bwl> rs,rd */
mov[a->sz](cpu_regs[a->rd], cpu_regs[a->rs]);
tcg_gen_ext_i32(cpu_regs[a->rd], cpu_regs[a->rs], a->sz | MO_SIGN);
return true;
}

Expand Down Expand Up @@ -570,10 +568,7 @@ static bool trans_MOVU_mr(DisasContext *ctx, arg_MOVU_mr *a)
/* movu.<bw> rs,rd */
static bool trans_MOVU_rr(DisasContext *ctx, arg_MOVU_rr *a)
{
static void (* const ext[])(TCGv ret, TCGv arg) = {
tcg_gen_ext8u_i32, tcg_gen_ext16u_i32,
};
ext[a->sz](cpu_regs[a->rd], cpu_regs[a->rs]);
tcg_gen_ext_i32(cpu_regs[a->rd], cpu_regs[a->rs], a->sz);
return true;
}

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