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Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20150610-1…
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…' into staging

stdvga: factor out mmio subregion init
virtio-gpu: add virtio gpu core code, 2d mode

# gpg: Signature made Wed Jun 10 10:03:11 2015 BST using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"

* remotes/kraxel/tags/pull-vga-20150610-1:
  virtio-gpu/2d: add virtio gpu core code
  virtio: update headers, add virtio-gpu (2d)
  stdvga: factor out mmio subregion init
  stdvga: pass VGACommonState instead of PCIVGAState
  stdvga: fix offset in pci_vga_ioport_read

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@pm215
pm215 committed Jun 10, 2015
2 parents 3974c9d + 62232bf commit 0e12e61
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Showing 7 changed files with 1,333 additions and 48 deletions.
2 changes: 2 additions & 0 deletions hw/display/Makefile.objs
View file
Expand Up @@ -34,3 +34,5 @@ obj-$(CONFIG_CG3) += cg3.o
obj-$(CONFIG_VGA) += vga.o

common-obj-$(CONFIG_QXL) += qxl.o qxl-logger.o qxl-render.o

obj-$(CONFIG_VIRTIO) += virtio-gpu.o
97 changes: 49 additions & 48 deletions hw/display/vga-pci.c
View file
Expand Up @@ -54,9 +54,7 @@ typedef struct PCIVGAState {
VGACommonState vga;
uint32_t flags;
MemoryRegion mmio;
MemoryRegion ioport;
MemoryRegion bochs;
MemoryRegion qext;
MemoryRegion mrs[3];
} PCIVGAState;

#define TYPE_PCI_VGA "pci-vga"
Expand All @@ -76,16 +74,16 @@ static const VMStateDescription vmstate_vga_pci = {
static uint64_t pci_vga_ioport_read(void *ptr, hwaddr addr,
unsigned size)
{
PCIVGAState *d = ptr;
VGACommonState *s = ptr;
uint64_t ret = 0;

switch (size) {
case 1:
ret = vga_ioport_read(&d->vga, addr);
ret = vga_ioport_read(s, addr + 0x3c0);
break;
case 2:
ret = vga_ioport_read(&d->vga, addr);
ret |= vga_ioport_read(&d->vga, addr+1) << 8;
ret = vga_ioport_read(s, addr + 0x3c0);
ret |= vga_ioport_read(s, addr + 0x3c1) << 8;
break;
}
return ret;
Expand All @@ -94,20 +92,20 @@ static uint64_t pci_vga_ioport_read(void *ptr, hwaddr addr,
static void pci_vga_ioport_write(void *ptr, hwaddr addr,
uint64_t val, unsigned size)
{
PCIVGAState *d = ptr;
VGACommonState *s = ptr;

switch (size) {
case 1:
vga_ioport_write(&d->vga, addr + 0x3c0, val);
vga_ioport_write(s, addr + 0x3c0, val);
break;
case 2:
/*
* Update bytes in little endian order. Allows to update
* indexed registers with a single word write because the
* index byte is updated first.
*/
vga_ioport_write(&d->vga, addr + 0x3c0, val & 0xff);
vga_ioport_write(&d->vga, addr + 0x3c1, (val >> 8) & 0xff);
vga_ioport_write(s, addr + 0x3c0, val & 0xff);
vga_ioport_write(s, addr + 0x3c1, (val >> 8) & 0xff);
break;
}
}
Expand All @@ -125,21 +123,21 @@ static const MemoryRegionOps pci_vga_ioport_ops = {
static uint64_t pci_vga_bochs_read(void *ptr, hwaddr addr,
unsigned size)
{
PCIVGAState *d = ptr;
VGACommonState *s = ptr;
int index = addr >> 1;

vbe_ioport_write_index(&d->vga, 0, index);
return vbe_ioport_read_data(&d->vga, 0);
vbe_ioport_write_index(s, 0, index);
return vbe_ioport_read_data(s, 0);
}

static void pci_vga_bochs_write(void *ptr, hwaddr addr,
uint64_t val, unsigned size)
{
PCIVGAState *d = ptr;
VGACommonState *s = ptr;
int index = addr >> 1;

vbe_ioport_write_index(&d->vga, 0, index);
vbe_ioport_write_data(&d->vga, 0, val);
vbe_ioport_write_index(s, 0, index);
vbe_ioport_write_data(s, 0, val);
}

static const MemoryRegionOps pci_vga_bochs_ops = {
Expand All @@ -154,13 +152,13 @@ static const MemoryRegionOps pci_vga_bochs_ops = {

static uint64_t pci_vga_qext_read(void *ptr, hwaddr addr, unsigned size)
{
PCIVGAState *d = ptr;
VGACommonState *s = ptr;

switch (addr) {
case PCI_VGA_QEXT_REG_SIZE:
return PCI_VGA_QEXT_SIZE;
case PCI_VGA_QEXT_REG_BYTEORDER:
return d->vga.big_endian_fb ?
return s->big_endian_fb ?
PCI_VGA_QEXT_BIG_ENDIAN : PCI_VGA_QEXT_LITTLE_ENDIAN;
default:
return 0;
Expand All @@ -170,15 +168,15 @@ static uint64_t pci_vga_qext_read(void *ptr, hwaddr addr, unsigned size)
static void pci_vga_qext_write(void *ptr, hwaddr addr,
uint64_t val, unsigned size)
{
PCIVGAState *d = ptr;
VGACommonState *s = ptr;

switch (addr) {
case PCI_VGA_QEXT_REG_BYTEORDER:
if (val == PCI_VGA_QEXT_BIG_ENDIAN) {
d->vga.big_endian_fb = true;
s->big_endian_fb = true;
}
if (val == PCI_VGA_QEXT_LITTLE_ENDIAN) {
d->vga.big_endian_fb = false;
s->big_endian_fb = false;
}
break;
}
Expand Down Expand Up @@ -206,10 +204,34 @@ static const MemoryRegionOps pci_vga_qext_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};

static void pci_std_vga_mmio_region_init(VGACommonState *s,
MemoryRegion *parent,
MemoryRegion *subs,
bool qext)
{
memory_region_init_io(&subs[0], NULL, &pci_vga_ioport_ops, s,
"vga ioports remapped", PCI_VGA_IOPORT_SIZE);
memory_region_add_subregion(parent, PCI_VGA_IOPORT_OFFSET,
&subs[0]);

memory_region_init_io(&subs[1], NULL, &pci_vga_bochs_ops, s,
"bochs dispi interface", PCI_VGA_BOCHS_SIZE);
memory_region_add_subregion(parent, PCI_VGA_BOCHS_OFFSET,
&subs[1]);

if (qext) {
memory_region_init_io(&subs[2], NULL, &pci_vga_qext_ops, s,
"qemu extended regs", PCI_VGA_QEXT_SIZE);
memory_region_add_subregion(parent, PCI_VGA_QEXT_OFFSET,
&subs[2]);
}
}

static void pci_std_vga_realize(PCIDevice *dev, Error **errp)
{
PCIVGAState *d = PCI_VGA(dev);
VGACommonState *s = &d->vga;
bool qext = false;

/* vga + console init */
vga_common_init(s, OBJECT(dev), true);
Expand All @@ -224,23 +246,12 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp)
/* mmio bar for vga register access */
if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_MMIO)) {
memory_region_init(&d->mmio, NULL, "vga.mmio", 4096);
memory_region_init_io(&d->ioport, NULL, &pci_vga_ioport_ops, d,
"vga ioports remapped", PCI_VGA_IOPORT_SIZE);
memory_region_init_io(&d->bochs, NULL, &pci_vga_bochs_ops, d,
"bochs dispi interface", PCI_VGA_BOCHS_SIZE);

memory_region_add_subregion(&d->mmio, PCI_VGA_IOPORT_OFFSET,
&d->ioport);
memory_region_add_subregion(&d->mmio, PCI_VGA_BOCHS_OFFSET,
&d->bochs);

if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_QEXT)) {
memory_region_init_io(&d->qext, NULL, &pci_vga_qext_ops, d,
"qemu extended regs", PCI_VGA_QEXT_SIZE);
memory_region_add_subregion(&d->mmio, PCI_VGA_QEXT_OFFSET,
&d->qext);
qext = true;
pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2);
}
pci_std_vga_mmio_region_init(s, &d->mmio, d->mrs, qext);

pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
}
Expand All @@ -262,30 +273,20 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp)
{
PCIVGAState *d = PCI_VGA(dev);
VGACommonState *s = &d->vga;
bool qext = false;

/* vga + console init */
vga_common_init(s, OBJECT(dev), false);
s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s);

/* mmio bar */
memory_region_init(&d->mmio, OBJECT(dev), "vga.mmio", 4096);
memory_region_init_io(&d->ioport, OBJECT(dev), &pci_vga_ioport_ops, d,
"vga ioports remapped", PCI_VGA_IOPORT_SIZE);
memory_region_init_io(&d->bochs, OBJECT(dev), &pci_vga_bochs_ops, d,
"bochs dispi interface", PCI_VGA_BOCHS_SIZE);

memory_region_add_subregion(&d->mmio, PCI_VGA_IOPORT_OFFSET,
&d->ioport);
memory_region_add_subregion(&d->mmio, PCI_VGA_BOCHS_OFFSET,
&d->bochs);

if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_QEXT)) {
memory_region_init_io(&d->qext, NULL, &pci_vga_qext_ops, d,
"qemu extended regs", PCI_VGA_QEXT_SIZE);
memory_region_add_subregion(&d->mmio, PCI_VGA_QEXT_OFFSET,
&d->qext);
qext = true;
pci_set_byte(&d->dev.config[PCI_REVISION_ID], 2);
}
pci_std_vga_mmio_region_init(s, &d->mmio, d->mrs, qext);

pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram);
pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
Expand Down

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