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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.6-201602…
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…01' into staging

ppc patch queue for 2016-02-01

Currently accumulated patches for target-ppc, pseries machine type and
related devices.
  * Cleanup of error handling code in spapr
  * A number of fixes for Macintosh devices for the benefit of MacOS 9 and X
  * Remove some abuses of the RTAS memory access functions in spapr
  * Fixes for the gdbstub (and monitor debug) for VMX and VSX extensions.
  * Fix pseries machine hotplug memory under TCG
  * Clean up and extend handling of multiple page sizes with 64-bit hash MMUs
  * Fix to the TCG implementation of mcrfs

# gpg: Signature made Mon 01 Feb 2016 02:28:34 GMT using RSA key ID 20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.6-20160201: (40 commits)
  target-ppc: mcrfs should always update FEX/VX and only clear exception bits
  target-ppc: Make every FPSCR_ macro have a corresponding FP_ macro
  target-ppc: Allow more page sizes for POWER7 & POWER8 in TCG
  target-ppc: Helper to determine page size information from hpte alone
  target-ppc: Add new TLB invalidate by HPTE call for hash64 MMUs
  target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one()
  target-ppc: Remove unused mmu models from ppc_tlb_invalidate_one
  target-ppc: Use actual page size encodings from HPTE
  target-ppc: Rework SLB page size lookup
  target-ppc: Rework ppc_store_slb
  target-ppc: Convert mmu-hash{32,64}.[ch] from CPUPPCState to PowerPCCPU
  target-ppc: Remove unused kvmppc_read_segment_page_sizes() stub
  uninorth.c: add support for UniNorth kMacRISCPCIAddressSelect (0x48) register
  cuda.c: return error for unknown commands
  pseries: Allow TCG h_enter to work with hotplugged memory
  target-ppc: gdbstub: Add VSX support
  target-ppc: gdbstub: fix spe registers for little-endian guests
  target-ppc: gdbstub: fix altivec registers for little-endian guests
  target-ppc: gdbstub: introduce avr_need_swap()
  target-ppc: gdbstub: fix float registers for little-endian guests
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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pm215 committed Feb 2, 2016
2 parents 0430891 + d127715 commit 10ae9d7
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Showing 26 changed files with 771 additions and 451 deletions.
6 changes: 3 additions & 3 deletions configure
Expand Up @@ -5702,20 +5702,20 @@ case "$target_name" in
ppc64)
TARGET_BASE_ARCH=ppc
TARGET_ABI_DIR=ppc
gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
;;
ppc64le)
TARGET_ARCH=ppc64
TARGET_BASE_ARCH=ppc
TARGET_ABI_DIR=ppc
gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
;;
ppc64abi32)
TARGET_ARCH=ppc64
TARGET_BASE_ARCH=ppc
TARGET_ABI_DIR=ppc
echo "TARGET_ABI32=y" >> $config_target_mak
gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml"
gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
;;
sh4|sh4eb)
TARGET_ARCH=sh4
Expand Down
44 changes: 44 additions & 0 deletions gdb-xml/power-vsx.xml
@@ -0,0 +1,44 @@
<?xml version="1.0"?>
<!-- Copyright (C) 2008-2015 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->

<!-- POWER7 VSX registers that do not overlap existing FP and VMX
registers. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.vsx">
<reg name="vs0h" bitsize="64" type="uint64"/>
<reg name="vs1h" bitsize="64" type="uint64"/>
<reg name="vs2h" bitsize="64" type="uint64"/>
<reg name="vs3h" bitsize="64" type="uint64"/>
<reg name="vs4h" bitsize="64" type="uint64"/>
<reg name="vs5h" bitsize="64" type="uint64"/>
<reg name="vs6h" bitsize="64" type="uint64"/>
<reg name="vs7h" bitsize="64" type="uint64"/>
<reg name="vs8h" bitsize="64" type="uint64"/>
<reg name="vs9h" bitsize="64" type="uint64"/>
<reg name="vs10h" bitsize="64" type="uint64"/>
<reg name="vs11h" bitsize="64" type="uint64"/>
<reg name="vs12h" bitsize="64" type="uint64"/>
<reg name="vs13h" bitsize="64" type="uint64"/>
<reg name="vs14h" bitsize="64" type="uint64"/>
<reg name="vs15h" bitsize="64" type="uint64"/>
<reg name="vs16h" bitsize="64" type="uint64"/>
<reg name="vs17h" bitsize="64" type="uint64"/>
<reg name="vs18h" bitsize="64" type="uint64"/>
<reg name="vs19h" bitsize="64" type="uint64"/>
<reg name="vs20h" bitsize="64" type="uint64"/>
<reg name="vs21h" bitsize="64" type="uint64"/>
<reg name="vs22h" bitsize="64" type="uint64"/>
<reg name="vs23h" bitsize="64" type="uint64"/>
<reg name="vs24h" bitsize="64" type="uint64"/>
<reg name="vs25h" bitsize="64" type="uint64"/>
<reg name="vs26h" bitsize="64" type="uint64"/>
<reg name="vs27h" bitsize="64" type="uint64"/>
<reg name="vs28h" bitsize="64" type="uint64"/>
<reg name="vs29h" bitsize="64" type="uint64"/>
<reg name="vs30h" bitsize="64" type="uint64"/>
<reg name="vs31h" bitsize="64" type="uint64"/>
</feature>
23 changes: 14 additions & 9 deletions hw/ide/macio.c
Expand Up @@ -120,8 +120,8 @@ static void pmac_dma_read(BlockBackend *blk,
MACIO_DPRINTF("--- Block read transfer - sector_num: %" PRIx64 " "
"nsector: %x\n", (offset >> 9), (bytes >> 9));

m->aiocb = blk_aio_readv(blk, (offset >> 9), &io->iov, (bytes >> 9),
cb, io);
s->bus->dma->aiocb = blk_aio_readv(blk, (offset >> 9), &io->iov,
(bytes >> 9), cb, io);
}

static void pmac_dma_write(BlockBackend *blk,
Expand Down Expand Up @@ -205,8 +205,8 @@ static void pmac_dma_write(BlockBackend *blk,
MACIO_DPRINTF("--- Block write transfer - sector_num: %" PRIx64 " "
"nsector: %x\n", (offset >> 9), (bytes >> 9));

m->aiocb = blk_aio_writev(blk, (offset >> 9), &io->iov, (bytes >> 9),
cb, io);
s->bus->dma->aiocb = blk_aio_writev(blk, (offset >> 9), &io->iov,
(bytes >> 9), cb, io);
}

static void pmac_dma_trim(BlockBackend *blk,
Expand All @@ -232,8 +232,8 @@ static void pmac_dma_trim(BlockBackend *blk,
s->io_buffer_index += io->len;
io->len = 0;

m->aiocb = ide_issue_trim(blk, (offset >> 9), &io->iov, (bytes >> 9),
cb, io);
s->bus->dma->aiocb = ide_issue_trim(blk, (offset >> 9), &io->iov,
(bytes >> 9), cb, io);
}

static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
Expand Down Expand Up @@ -292,6 +292,8 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
} else {
block_acct_done(blk_get_stats(s->blk), &s->acct);
}

ide_set_inactive(s, false);
io->dma_end(opaque);
}

Expand All @@ -306,7 +308,6 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)

if (ret < 0) {
MACIO_DPRINTF("DMA error: %d\n", ret);
m->aiocb = NULL;
ide_dma_error(s);
goto done;
}
Expand Down Expand Up @@ -357,6 +358,8 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
block_acct_done(blk_get_stats(s->blk), &s->acct);
}
}

ide_set_inactive(s, false);
io->dma_end(opaque);
}

Expand Down Expand Up @@ -394,8 +397,9 @@ static void pmac_ide_transfer(DBDMA_io *io)
static void pmac_ide_flush(DBDMA_io *io)
{
MACIOIDEState *m = io->opaque;
IDEState *s = idebus_active_if(&m->bus);

if (m->aiocb) {
if (s->bus->dma->aiocb) {
blk_drain_all();
}
}
Expand Down Expand Up @@ -513,11 +517,12 @@ static const MemoryRegionOps pmac_ide_ops = {

static const VMStateDescription vmstate_pmac = {
.name = "ide",
.version_id = 3,
.version_id = 4,
.minimum_version_id = 0,
.fields = (VMStateField[]) {
VMSTATE_IDE_BUS(bus, MACIOIDEState),
VMSTATE_IDE_DRIVES(bus.ifs, MACIOIDEState),
VMSTATE_BOOL(dma_active, MACIOIDEState),
VMSTATE_END_OF_LIST()
}
};
Expand Down
12 changes: 10 additions & 2 deletions hw/misc/macio/cuda.c
Expand Up @@ -606,6 +606,11 @@ static void cuda_receive_packet(CUDAState *s,
}
break;
default:
obuf[0] = ERROR_PACKET;
obuf[1] = 0x2;
obuf[2] = CUDA_PACKET;
obuf[3] = data[0];
cuda_send_packet_to_host(s, obuf, 4);
break;
}
}
Expand Down Expand Up @@ -705,15 +710,17 @@ static const VMStateDescription vmstate_cuda_timer = {

static const VMStateDescription vmstate_cuda = {
.name = "cuda",
.version_id = 2,
.minimum_version_id = 2,
.version_id = 3,
.minimum_version_id = 3,
.fields = (VMStateField[]) {
VMSTATE_UINT8(a, CUDAState),
VMSTATE_UINT8(b, CUDAState),
VMSTATE_UINT8(last_b, CUDAState),
VMSTATE_UINT8(dira, CUDAState),
VMSTATE_UINT8(dirb, CUDAState),
VMSTATE_UINT8(sr, CUDAState),
VMSTATE_UINT8(acr, CUDAState),
VMSTATE_UINT8(last_acr, CUDAState),
VMSTATE_UINT8(pcr, CUDAState),
VMSTATE_UINT8(ifr, CUDAState),
VMSTATE_UINT8(ier, CUDAState),
Expand All @@ -728,6 +735,7 @@ static const VMStateDescription vmstate_cuda = {
VMSTATE_STRUCT_ARRAY(timers, CUDAState, 2, 1,
vmstate_cuda_timer, CUDATimer),
VMSTATE_TIMER_PTR(adb_poll_timer, CUDAState),
VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState),
VMSTATE_END_OF_LIST()
}
};
Expand Down
40 changes: 36 additions & 4 deletions hw/misc/macio/mac_dbdma.c
Expand Up @@ -713,20 +713,52 @@ static const MemoryRegionOps dbdma_ops = {
},
};

static const VMStateDescription vmstate_dbdma_channel = {
.name = "dbdma_channel",
static const VMStateDescription vmstate_dbdma_io = {
.name = "dbdma_io",
.version_id = 0,
.minimum_version_id = 0,
.fields = (VMStateField[]) {
VMSTATE_UINT64(addr, struct DBDMA_io),
VMSTATE_INT32(len, struct DBDMA_io),
VMSTATE_INT32(is_last, struct DBDMA_io),
VMSTATE_INT32(is_dma_out, struct DBDMA_io),
VMSTATE_BOOL(processing, struct DBDMA_io),
VMSTATE_END_OF_LIST()
}
};

static const VMStateDescription vmstate_dbdma_cmd = {
.name = "dbdma_cmd",
.version_id = 0,
.minimum_version_id = 0,
.fields = (VMStateField[]) {
VMSTATE_UINT16(req_count, dbdma_cmd),
VMSTATE_UINT16(command, dbdma_cmd),
VMSTATE_UINT32(phy_addr, dbdma_cmd),
VMSTATE_UINT32(cmd_dep, dbdma_cmd),
VMSTATE_UINT16(res_count, dbdma_cmd),
VMSTATE_UINT16(xfer_status, dbdma_cmd),
VMSTATE_END_OF_LIST()
}
};

static const VMStateDescription vmstate_dbdma_channel = {
.name = "dbdma_channel",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32_ARRAY(regs, struct DBDMA_channel, DBDMA_REGS),
VMSTATE_STRUCT(io, struct DBDMA_channel, 0, vmstate_dbdma_io, DBDMA_io),
VMSTATE_STRUCT(current, struct DBDMA_channel, 0, vmstate_dbdma_cmd,
dbdma_cmd),
VMSTATE_END_OF_LIST()
}
};

static const VMStateDescription vmstate_dbdma = {
.name = "dbdma",
.version_id = 2,
.minimum_version_id = 2,
.version_id = 3,
.minimum_version_id = 3,
.fields = (VMStateField[]) {
VMSTATE_STRUCT_ARRAY(channels, DBDMAState, DBDMA_CHANNELS, 1,
vmstate_dbdma_channel, DBDMA_channel),
Expand Down
9 changes: 9 additions & 0 deletions hw/pci-host/uninorth.c
Expand Up @@ -331,6 +331,15 @@ static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
d->config[0x0C] = 0x08; // cache_line_size
d->config[0x0D] = 0x10; // latency_timer
// d->config[0x34] = 0x80; // capabilities_pointer
/*
* Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI
* memory space with base 0x80000000, size 0x10000000 for Apple's
* AppleMacRiscPCI driver
*/
d->config[0x48] = 0x0;
d->config[0x49] = 0x0;
d->config[0x4a] = 0x0;
d->config[0x4b] = 0x1;
}

static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp)
Expand Down
1 change: 0 additions & 1 deletion hw/ppc/mac.h
Expand Up @@ -134,7 +134,6 @@ typedef struct MACIOIDEState {

MemoryRegion mem;
IDEBus bus;
BlockAIOCB *aiocb;
IDEDMA dma;
void *dbdma;
bool dma_active;
Expand Down

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