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hw/arm: Add GPIO and SD to BCM2838 periph
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Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240226000259.2752893-10-sergey.kambalin@auriga.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@serg3vik @pm215
serg3vik authored and pm215 committed Feb 27, 2024
1 parent b54a9a5 commit 1367375
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Showing 2 changed files with 151 additions and 0 deletions.
143 changes: 143 additions & 0 deletions hw/arm/bcm2838_peripherals.c
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Original file line number Diff line number Diff line change
Expand Up @@ -15,22 +15,56 @@
/* Lower peripheral base address on the VC (GPU) system bus */
#define BCM2838_VC_PERI_LOW_BASE 0x7c000000

/* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
#define BCM2835_SDHC_CAPAREG 0x52134b4

static void bcm2838_peripherals_init(Object *obj)
{
BCM2838PeripheralState *s = BCM2838_PERIPHERALS(obj);
BCM2838PeripheralClass *bc = BCM2838_PERIPHERALS_GET_CLASS(obj);
BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(obj);

/* Lower memory region for peripheral devices (exported to the Soc) */
memory_region_init(&s->peri_low_mr, obj, "bcm2838-peripherals",
bc->peri_low_size);
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_low_mr);

/* Extended Mass Media Controller 2 */
object_initialize_child(obj, "emmc2", &s->emmc2, TYPE_SYSBUS_SDHCI);

/* GPIO */
object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2838_GPIO);

object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
OBJECT(&s_base->sdhci.sdbus));
object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
OBJECT(&s_base->sdhost.sdbus));

object_initialize_child(obj, "mmc_irq_orgate", &s->mmc_irq_orgate,
TYPE_OR_IRQ);
object_property_set_int(OBJECT(&s->mmc_irq_orgate), "num-lines", 2,
&error_abort);

object_initialize_child(obj, "dma_7_8_irq_orgate", &s->dma_7_8_irq_orgate,
TYPE_OR_IRQ);
object_property_set_int(OBJECT(&s->dma_7_8_irq_orgate), "num-lines", 2,
&error_abort);

object_initialize_child(obj, "dma_9_10_irq_orgate", &s->dma_9_10_irq_orgate,
TYPE_OR_IRQ);
object_property_set_int(OBJECT(&s->dma_9_10_irq_orgate), "num-lines", 2,
&error_abort);
}

static void bcm2838_peripherals_realize(DeviceState *dev, Error **errp)
{
DeviceState *mmc_irq_orgate;
DeviceState *dma_7_8_irq_orgate;
DeviceState *dma_9_10_irq_orgate;
MemoryRegion *mphi_mr;
BCM2838PeripheralState *s = BCM2838_PERIPHERALS(dev);
BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(dev);
int n;

bcm_soc_peripherals_common_realize(dev, errp);

Expand All @@ -42,6 +76,115 @@ static void bcm2838_peripherals_realize(DeviceState *dev, Error **errp)
BCM2838_VC_PERI_LOW_BASE,
&s->peri_low_mr_alias, 1);

/* Extended Mass Media Controller 2 */
object_property_set_uint(OBJECT(&s->emmc2), "sd-spec-version", 3,
&error_abort);
object_property_set_uint(OBJECT(&s->emmc2), "capareg",
BCM2835_SDHC_CAPAREG, &error_abort);
object_property_set_bool(OBJECT(&s->emmc2), "pending-insert-quirk", true,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->emmc2), errp)) {
return;
}

memory_region_add_subregion(&s_base->peri_mr, EMMC2_OFFSET,
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->emmc2),
0));

/* According to DTS, EMMC and EMMC2 share one irq */
if (!qdev_realize(DEVICE(&s->mmc_irq_orgate), NULL, errp)) {
return;
}

mmc_irq_orgate = DEVICE(&s->mmc_irq_orgate);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc2), 0,
qdev_get_gpio_in(mmc_irq_orgate, 0));

sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->sdhci), 0,
qdev_get_gpio_in(mmc_irq_orgate, 1));

/* Connect EMMC and EMMC2 to the interrupt controller */
qdev_connect_gpio_out(mmc_irq_orgate, 0,
qdev_get_gpio_in_named(DEVICE(&s_base->ic),
BCM2835_IC_GPU_IRQ,
INTERRUPT_ARASANSDIO));

/* Connect DMA 0-6 to the interrupt controller */
for (n = 0; n < 7; n++) {
sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), n,
qdev_get_gpio_in_named(DEVICE(&s_base->ic),
BCM2835_IC_GPU_IRQ,
GPU_INTERRUPT_DMA0 + n));
}

/* According to DTS, DMA 7 and 8 share one irq */
if (!qdev_realize(DEVICE(&s->dma_7_8_irq_orgate), NULL, errp)) {
return;
}
dma_7_8_irq_orgate = DEVICE(&s->dma_7_8_irq_orgate);

/* Connect DMA 7-8 to the interrupt controller */
sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), 7,
qdev_get_gpio_in(dma_7_8_irq_orgate, 0));
sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), 8,
qdev_get_gpio_in(dma_7_8_irq_orgate, 1));

qdev_connect_gpio_out(dma_7_8_irq_orgate, 0,
qdev_get_gpio_in_named(DEVICE(&s_base->ic),
BCM2835_IC_GPU_IRQ,
GPU_INTERRUPT_DMA7_8));

/* According to DTS, DMA 9 and 10 share one irq */
if (!qdev_realize(DEVICE(&s->dma_9_10_irq_orgate), NULL, errp)) {
return;
}
dma_9_10_irq_orgate = DEVICE(&s->dma_9_10_irq_orgate);

/* Connect DMA 9-10 to the interrupt controller */
sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), 9,
qdev_get_gpio_in(dma_9_10_irq_orgate, 0));
sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), 10,
qdev_get_gpio_in(dma_9_10_irq_orgate, 1));

qdev_connect_gpio_out(dma_9_10_irq_orgate, 0,
qdev_get_gpio_in_named(DEVICE(&s_base->ic),
BCM2835_IC_GPU_IRQ,
GPU_INTERRUPT_DMA9_10));

/* Connect DMA 11-14 to the interrupt controller */
for (n = 11; n < 15; n++) {
sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), n,
qdev_get_gpio_in_named(DEVICE(&s_base->ic),
BCM2835_IC_GPU_IRQ,
GPU_INTERRUPT_DMA11 + n
- 11));
}

/*
* Connect DMA 15 to the interrupt controller, it is physically removed
* from other DMA channels and exclusively used by the GPU
*/
sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), 15,
qdev_get_gpio_in_named(DEVICE(&s_base->ic),
BCM2835_IC_GPU_IRQ,
GPU_INTERRUPT_DMA15));

/* Map MPHI to BCM2838 memory map */
mphi_mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s_base->mphi), 0);
memory_region_init_alias(&s->mphi_mr_alias, OBJECT(s), "mphi", mphi_mr, 0,
BCM2838_MPHI_SIZE);
memory_region_add_subregion(&s_base->peri_mr, BCM2838_MPHI_OFFSET,
&s->mphi_mr_alias);

/* GPIO */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
return;
}
memory_region_add_subregion(
&s_base->peri_mr, GPIO_OFFSET,
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));

object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
}

static void bcm2838_peripherals_class_init(ObjectClass *oc, void *data)
Expand Down
8 changes: 8 additions & 0 deletions include/hw/arm/bcm2838_peripherals.h
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,8 @@
#define BCM2838_PERIPHERALS_H

#include "hw/arm/bcm2835_peripherals.h"
#include "hw/sd/sdhci.h"
#include "hw/gpio/bcm2838_gpio.h"

/* SPI */
#define GIC_SPI_INTERRUPT_MBOX 33
Expand Down Expand Up @@ -45,6 +47,9 @@
#define GPU_INTERRUPT_DMA14 28
#define GPU_INTERRUPT_DMA15 31

#define BCM2838_MPHI_OFFSET 0xb200
#define BCM2838_MPHI_SIZE 0x200

#define TYPE_BCM2838_PERIPHERALS "bcm2838-peripherals"
OBJECT_DECLARE_TYPE(BCM2838PeripheralState, BCM2838PeripheralClass,
BCM2838_PERIPHERALS)
Expand All @@ -58,6 +63,9 @@ struct BCM2838PeripheralState {
MemoryRegion peri_low_mr_alias;
MemoryRegion mphi_mr_alias;

SDHCIState emmc2;
BCM2838GpioState gpio;

OrIRQState mmc_irq_orgate;
OrIRQState dma_7_8_irq_orgate;
OrIRQState dma_9_10_irq_orgate;
Expand Down

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