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pc: acpi: q35: move IQCR() into SSDT
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Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Igor Mammedov authored and mstsirkin committed Jan 9, 2016
1 parent 12e3b1f commit 16682a9
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Showing 2 changed files with 33 additions and 27 deletions.
51 changes: 33 additions & 18 deletions hw/i386/acpi-build.c
Expand Up @@ -1525,6 +1525,36 @@ static Aml *build_gsi_link_dev(const char *name, uint8_t uid, uint8_t gsi)
return dev;
}

/* _CRS method - get current settings */
static Aml *build_iqcr_method(bool is_piix4)
{
Aml *if_ctx;
uint32_t irqs;
Aml *method = aml_method("IQCR", 1, AML_SERIALIZED);
Aml *crs = aml_resource_template();

irqs = 0;
aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL,
AML_ACTIVE_HIGH, AML_SHARED, &irqs, 1));
aml_append(method, aml_name_decl("PRR0", crs));

aml_append(method,
aml_create_dword_field(aml_name("PRR0"), aml_int(5), "PRRI"));

if (is_piix4) {
if_ctx = aml_if(aml_lless(aml_arg(0), aml_int(0x80)));
aml_append(if_ctx, aml_store(aml_arg(0), aml_name("PRRI")));
aml_append(method, if_ctx);
} else {
aml_append(method,
aml_store(aml_and(aml_arg(0), aml_int(0xF), NULL),
aml_name("PRRI")));
}

aml_append(method, aml_return(aml_name("PRR0")));
return method;
}

static void build_piix4_pci0_int(Aml *table)
{
Aml *dev;
Expand Down Expand Up @@ -1556,24 +1586,7 @@ static void build_piix4_pci0_int(Aml *table)
}
aml_append(sb_scope, method);

/* _CRS method - get current settings */
method = aml_method("IQCR", 1, AML_SERIALIZED);
{
crs = aml_resource_template();
irqs = 0;
aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL,
AML_ACTIVE_HIGH, AML_SHARED, &irqs, 1));
aml_append(method, aml_name_decl("PRR0", crs));

aml_append(method,
aml_create_dword_field(aml_name("PRR0"), aml_int(5), "PRRI"));

if_ctx = aml_if(aml_lless(aml_arg(0), aml_int(0x80)));
aml_append(if_ctx, aml_store(aml_arg(0), aml_name("PRRI")));
aml_append(method, if_ctx);
aml_append(method, aml_return(aml_name("PRR0")));
}
aml_append(sb_scope, method);
aml_append(sb_scope, build_iqcr_method(true));

aml_append(sb_scope, build_link_dev("LNKA", 0, aml_name("PRQ0")));
aml_append(sb_scope, build_link_dev("LNKB", 1, aml_name("PRQ1")));
Expand Down Expand Up @@ -1619,6 +1632,8 @@ static void build_q35_pci0_int(Aml *table)
{
Aml *sb_scope = aml_scope("_SB");

aml_append(sb_scope, build_iqcr_method(false));

aml_append(sb_scope, build_link_dev("LNKA", 0, aml_name("PRQA")));
aml_append(sb_scope, build_link_dev("LNKB", 1, aml_name("PRQB")));
aml_append(sb_scope, build_link_dev("LNKC", 2, aml_name("PRQC")));
Expand Down
9 changes: 0 additions & 9 deletions hw/i386/q35-acpi-dsdt.dsl
Expand Up @@ -305,15 +305,6 @@ DefinitionBlock (
}
Return (0x0B)
}
Method(IQCR, 1, Serialized) {
// _CRS method - get current settings
Name(PRR0, ResourceTemplate() {
Interrupt(, Level, ActiveHigh, Shared) { 0 }
})
CreateDWordField(PRR0, 0x05, PRRI)
Store(And(Arg0, 0x0F), PRRI)
Return (PRR0)
}

External(LNKA, DeviceObj)
External(LNKB, DeviceObj)
Expand Down

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