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target-cris: update CPU state save/load to use VMStateDescription
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Update the CRIS CPU state save/load to use a VMStateDescription struct
rather than cpu_save/cpu_load functions.

Have to define TLBSet struct.
Multidimensional arrays in C are a mess, just unroll them.

Signed-off-by: Juan Quintela <quintela@redhat.com>
[PMM:
 * expand commit message a little since it's no longer one patch in
   a 35-patch series
 * add header/copyright comment to machine.c; credited copyright is
   Red Hat and author is Juan, since this commit gives the file all-new
   contents; license is LGPL-2-or-later, to match other target-cris code
 * remove hardcoded tab
 * add fields for locked_irq, interrupt_vector, fault_vector, trap_vector
 * drop minimum_version_id_old fields
 * bump version_id to 2 as we are not compatible with old state format
 * remove unnecessary hw/boards.h include
 * update to register via dc->vmsd]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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@pm215
Juan Quintela authored and pm215 committed Sep 17, 2015
1 parent cc450bf commit 16a1b6e
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Showing 4 changed files with 95 additions and 90 deletions.
4 changes: 4 additions & 0 deletions target-cris/cpu-qom.h
View file
Expand Up @@ -73,6 +73,10 @@ static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env)

#define ENV_OFFSET offsetof(CRISCPU, env)

#ifndef CONFIG_USER_ONLY
extern const struct VMStateDescription vmstate_cris_cpu;
#endif

void cris_cpu_do_interrupt(CPUState *cpu);
void crisv10_cpu_do_interrupt(CPUState *cpu);
bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
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1 change: 1 addition & 0 deletions target-cris/cpu.c
View file
Expand Up @@ -302,6 +302,7 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
cc->handle_mmu_fault = cris_cpu_handle_mmu_fault;
#else
cc->get_phys_page_debug = cris_cpu_get_phys_page_debug;
dc->vmsd = &vmstate_cris_cpu;
#endif

cc->gdb_num_core_regs = 49;
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13 changes: 6 additions & 7 deletions target-cris/cpu.h
View file
Expand Up @@ -108,6 +108,11 @@

#define NB_MMU_MODES 2

typedef struct {
uint32_t hi;
uint32_t lo;
} TLBSet;

typedef struct CPUCRISState {
uint32_t regs[16];
/* P0 - P15 are referred to as special registers in the docs. */
Expand Down Expand Up @@ -161,11 +166,7 @@ typedef struct CPUCRISState {
*
* One for I and another for D.
*/
struct
{
uint32_t hi;
uint32_t lo;
} tlbsets[2][4][16];
TLBSet tlbsets[2][4][16];

CPU_COMMON

Expand Down Expand Up @@ -227,8 +228,6 @@ enum {
#define cpu_gen_code cpu_cris_gen_code
#define cpu_signal_handler cpu_cris_signal_handler

#define CPU_SAVE_VERSION 1

/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
#define MMU_MODE1_SUFFIX _user
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167 changes: 84 additions & 83 deletions target-cris/machine.c
View file
@@ -1,90 +1,91 @@
#include "hw/hw.h"
#include "hw/boards.h"

void cpu_save(QEMUFile *f, void *opaque)
{
CPUCRISState *env = opaque;
int i;
int s;
int mmu;

for (i = 0; i < 16; i++)
qemu_put_be32(f, env->regs[i]);
for (i = 0; i < 16; i++)
qemu_put_be32(f, env->pregs[i]);

qemu_put_be32(f, env->pc);
qemu_put_be32(f, env->ksp);
/*
* CRIS virtual CPU state save/load support
*
* Copyright (c) 2012 Red Hat, Inc.
* Written by Juan Quintela <quintela@redhat.com>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/

qemu_put_be32(f, env->dslot);
qemu_put_be32(f, env->btaken);
qemu_put_be32(f, env->btarget);

qemu_put_be32(f, env->cc_op);
qemu_put_be32(f, env->cc_mask);
qemu_put_be32(f, env->cc_dest);
qemu_put_be32(f, env->cc_src);
qemu_put_be32(f, env->cc_result);
qemu_put_be32(f, env->cc_size);
qemu_put_be32(f, env->cc_x);

for (s = 0; s < 4; s++) {
for (i = 0; i < 16; i++)
qemu_put_be32(f, env->sregs[s][i]);
}
#include "hw/hw.h"

qemu_put_be32(f, env->mmu_rand_lfsr);
for (mmu = 0; mmu < 2; mmu++) {
for (s = 0; s < 4; s++) {
for (i = 0; i < 16; i++) {
qemu_put_be32(f, env->tlbsets[mmu][s][i].lo);
qemu_put_be32(f, env->tlbsets[mmu][s][i].hi);
}
}
static const VMStateDescription vmstate_tlbset = {
.name = "cpu/tlbset",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32(lo, TLBSet),
VMSTATE_UINT32(hi, TLBSet),
VMSTATE_END_OF_LIST()
}
}

int cpu_load(QEMUFile *f, void *opaque, int version_id)
{
CPUCRISState *env = opaque;
int i;
int s;
int mmu;

for (i = 0; i < 16; i++)
env->regs[i] = qemu_get_be32(f);
for (i = 0; i < 16; i++)
env->pregs[i] = qemu_get_be32(f);

env->pc = qemu_get_be32(f);
env->ksp = qemu_get_be32(f);
};

env->dslot = qemu_get_be32(f);
env->btaken = qemu_get_be32(f);
env->btarget = qemu_get_be32(f);

env->cc_op = qemu_get_be32(f);
env->cc_mask = qemu_get_be32(f);
env->cc_dest = qemu_get_be32(f);
env->cc_src = qemu_get_be32(f);
env->cc_result = qemu_get_be32(f);
env->cc_size = qemu_get_be32(f);
env->cc_x = qemu_get_be32(f);

for (s = 0; s < 4; s++) {
for (i = 0; i < 16; i++)
env->sregs[s][i] = qemu_get_be32(f);
static const VMStateDescription vmstate_cris_env = {
.name = "env",
.version_id = 2,
.minimum_version_id = 2,
.fields = (VMStateField[]) {
VMSTATE_UINT32_ARRAY(regs, CPUCRISState, 16),
VMSTATE_UINT32_ARRAY(pregs, CPUCRISState, 16),
VMSTATE_UINT32(pc, CPUCRISState),
VMSTATE_UINT32(ksp, CPUCRISState),
VMSTATE_INT32(dslot, CPUCRISState),
VMSTATE_INT32(btaken, CPUCRISState),
VMSTATE_UINT32(btarget, CPUCRISState),
VMSTATE_UINT32(cc_op, CPUCRISState),
VMSTATE_UINT32(cc_mask, CPUCRISState),
VMSTATE_UINT32(cc_dest, CPUCRISState),
VMSTATE_UINT32(cc_src, CPUCRISState),
VMSTATE_UINT32(cc_result, CPUCRISState),
VMSTATE_INT32(cc_size, CPUCRISState),
VMSTATE_INT32(cc_x, CPUCRISState),
VMSTATE_INT32(locked_irq, CPUCRISState),
VMSTATE_INT32(interrupt_vector, CPUCRISState),
VMSTATE_INT32(fault_vector, CPUCRISState),
VMSTATE_INT32(trap_vector, CPUCRISState),
VMSTATE_UINT32_ARRAY(sregs[0], CPUCRISState, 16),
VMSTATE_UINT32_ARRAY(sregs[1], CPUCRISState, 16),
VMSTATE_UINT32_ARRAY(sregs[2], CPUCRISState, 16),
VMSTATE_UINT32_ARRAY(sregs[3], CPUCRISState, 16),
VMSTATE_UINT32(mmu_rand_lfsr, CPUCRISState),
VMSTATE_STRUCT_ARRAY(tlbsets[0][0], CPUCRISState, 16, 0,
vmstate_tlbset, TLBSet),
VMSTATE_STRUCT_ARRAY(tlbsets[0][1], CPUCRISState, 16, 0,
vmstate_tlbset, TLBSet),
VMSTATE_STRUCT_ARRAY(tlbsets[0][2], CPUCRISState, 16, 0,
vmstate_tlbset, TLBSet),
VMSTATE_STRUCT_ARRAY(tlbsets[0][3], CPUCRISState, 16, 0,
vmstate_tlbset, TLBSet),
VMSTATE_STRUCT_ARRAY(tlbsets[1][0], CPUCRISState, 16, 0,
vmstate_tlbset, TLBSet),
VMSTATE_STRUCT_ARRAY(tlbsets[1][1], CPUCRISState, 16, 0,
vmstate_tlbset, TLBSet),
VMSTATE_STRUCT_ARRAY(tlbsets[1][2], CPUCRISState, 16, 0,
vmstate_tlbset, TLBSet),
VMSTATE_STRUCT_ARRAY(tlbsets[1][3], CPUCRISState, 16, 0,
vmstate_tlbset, TLBSet),
VMSTATE_END_OF_LIST()
}
};

env->mmu_rand_lfsr = qemu_get_be32(f);
for (mmu = 0; mmu < 2; mmu++) {
for (s = 0; s < 4; s++) {
for (i = 0; i < 16; i++) {
env->tlbsets[mmu][s][i].lo = qemu_get_be32(f);
env->tlbsets[mmu][s][i].hi = qemu_get_be32(f);
}
}
const VMStateDescription vmstate_cris_cpu = {
.name = "cpu",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_CPU(),
VMSTATE_STRUCT(env, CRISCPU, 1, vmstate_cris_env, CPUCRISState),
VMSTATE_END_OF_LIST()
}

return 0;
}
};

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