Skip to content

Commit

Permalink
lm32: replace cpu_lm32_init() with cpu_generic_init()
Browse files Browse the repository at this point in the history
it's just a wrapper, drop it and use cpu_generic_init() directly

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Michael Walle <michael@walle.cc>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <1503592308-93913-22-git-send-email-imammedo@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
  • Loading branch information
Igor Mammedov authored and ehabkost committed Sep 1, 2017
1 parent a7a1c09 commit 1d19741
Show file tree
Hide file tree
Showing 4 changed files with 4 additions and 10 deletions.
4 changes: 2 additions & 2 deletions hw/lm32/lm32_boards.c
Expand Up @@ -104,7 +104,7 @@ static void lm32_evr_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "lm32-full";
}
cpu = cpu_lm32_init(cpu_model);
cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model);
exit(1);
Expand Down Expand Up @@ -205,7 +205,7 @@ static void lm32_uclinux_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "lm32-full";
}
cpu = cpu_lm32_init(cpu_model);
cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model);
exit(1);
Expand Down
2 changes: 1 addition & 1 deletion hw/lm32/milkymist.c
Expand Up @@ -111,7 +111,7 @@ milkymist_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "lm32-full";
}
cpu = cpu_lm32_init(cpu_model);
cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
if (cpu == NULL) {
fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model);
exit(1);
Expand Down
3 changes: 1 addition & 2 deletions target/lm32/cpu.h
Expand Up @@ -238,7 +238,6 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx)
return (dc >> (idx+1)*2) & 0x3;
}

LM32CPU *cpu_lm32_init(const char *cpu_model);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
Expand All @@ -256,7 +255,7 @@ void lm32_watchpoint_insert(CPULM32State *env, int index, target_ulong address,
void lm32_watchpoint_remove(CPULM32State *env, int index);
bool lm32_cpu_do_semihosting(CPUState *cs);

#define cpu_init(cpu_model) CPU(cpu_lm32_init(cpu_model))
#define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model)

#define cpu_list lm32_cpu_list
#define cpu_signal_handler cpu_lm32_signal_handler
Expand Down
5 changes: 0 additions & 5 deletions target/lm32/helper.c
Expand Up @@ -219,11 +219,6 @@ bool lm32_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return false;
}

LM32CPU *cpu_lm32_init(const char *cpu_model)
{
return LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));
}

/* Some soc ignores the MSB on the address bus. Thus creating a shadow memory
* area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
* 0x80000000-0xffffffff is not cached and used to access IO devices. */
Expand Down

0 comments on commit 1d19741

Please sign in to comment.