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hw/arm/virt: fix GIC maintenance IRQ registration
Since commit 9036e91 ("{include/}hw/arm: refactor virt PPI logic"), GIC maintenance IRQ registration fails on arm64: [ 0.979743] kvm [1]: Cannot register interrupt 9 That commit re-defined VIRTUAL_PMU_IRQ to be a INTID but missed a case where the maintenance IRQ is actually referred by its PPI index. Just like commit fa68ecb ("hw/arm/virt: fix PMU IRQ registration"), use INITID_TO_PPI(). A search of "GIC_FDT_IRQ_TYPE_PPI" indicates that there shouldn't be more similar issues. Fixes: 9036e91 ("{include/}hw/arm: refactor virt PPI logic") Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-id: 20231110090557.3219206-2-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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