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aspeed: Introduce helper for 32-bit hosts limitation
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On 32-bit hosts, RAM has a 2047 MB limit. Use a macro to define the
default ram size of machines (AST2600 SoC) that can have 2 GB.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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legoater committed Sep 1, 2023
1 parent 17780ed commit 1e2c22c
Showing 1 changed file with 9 additions and 12 deletions.
21 changes: 9 additions & 12 deletions hw/arm/aspeed.c
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,13 @@ struct AspeedMachineState {
char *spi_model;
};

/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
#if HOST_LONG_BITS == 32
#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
#else
#define ASPEED_RAM_SIZE(sz) (sz)
#endif

/* Palmetto hardware value: 0x120CE416 */
#define PALMETTO_BMC_HW_STRAP1 ( \
SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
Expand Down Expand Up @@ -1423,12 +1430,7 @@ static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data)
aspeed_soc_num_cpus(amc->soc_name);
};

/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
#if HOST_LONG_BITS == 32
#define FUJI_BMC_RAM_SIZE (1 * GiB)
#else
#define FUJI_BMC_RAM_SIZE (2 * GiB)
#endif
#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)

static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
{
Expand All @@ -1450,12 +1452,7 @@ static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
aspeed_soc_num_cpus(amc->soc_name);
};

/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
#if HOST_LONG_BITS == 32
#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
#else
#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
#endif
#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)

static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
{
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