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target-sparc: Split out get_temp_i32
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Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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rth7680 authored and blueswirl committed Oct 20, 2012
1 parent 5e6ed43 commit 2ae23e1
Showing 1 changed file with 17 additions and 12 deletions.
29 changes: 17 additions & 12 deletions target-sparc/translate.c
Expand Up @@ -125,6 +125,22 @@ static int sign_extend(int x, int len)

#define IS_IMM (insn & (1<<13))

static inline TCGv_i32 get_temp_i32(DisasContext *dc)
{
TCGv_i32 t;
assert(dc->n_t32 < ARRAY_SIZE(dc->t32));
dc->t32[dc->n_t32++] = t = tcg_temp_new_i32();
return t;
}

static inline TCGv get_temp_tl(DisasContext *dc)
{
TCGv t;
assert(dc->n_ttl < ARRAY_SIZE(dc->ttl));
dc->ttl[dc->n_ttl++] = t = tcg_temp_new();
return t;
}

static inline void gen_update_fprs_dirty(int rd)
{
#if defined(TARGET_SPARC64)
Expand All @@ -145,16 +161,13 @@ static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src)
if (src & 1) {
return MAKE_TCGV_I32(GET_TCGV_I64(cpu_fpr[src / 2]));
} else {
TCGv_i32 ret = tcg_temp_new_i32();
TCGv_i32 ret = get_temp_i32(dc);
TCGv_i64 t = tcg_temp_new_i64();

tcg_gen_shri_i64(t, cpu_fpr[src / 2], 32);
tcg_gen_trunc_i64_i32(ret, t);
tcg_temp_free_i64(t);

dc->t32[dc->n_t32++] = ret;
assert(dc->n_t32 <= ARRAY_SIZE(dc->t32));

return ret;
}
#endif
Expand Down Expand Up @@ -265,14 +278,6 @@ static inline void gen_address_mask(DisasContext *dc, TCGv addr)
#endif
}

static inline TCGv get_temp_tl(DisasContext *dc)
{
TCGv t;
assert(dc->n_ttl < ARRAY_SIZE(dc->ttl));
dc->ttl[dc->n_ttl++] = t = tcg_temp_new();
return t;
}

static inline TCGv gen_load_gpr(DisasContext *dc, int reg)
{
if (reg == 0 || reg >= 8) {
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