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target/i386: Add few security fix bits in ARCH_CAPABILITIES into Sapp…
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…hireRapids CPU model

SapphireRapids has bit 13, 14 and 15 of MSR_IA32_ARCH_CAPABILITIES
enabled, which are related to some security fixes.

Add version 2 of SapphireRapids CPU model with those bits enabled also.

Signed-off-by: Lei Wang <lei4.wang@intel.com>
Signed-off-by: Tao Su <tao1.su@linux.intel.com>
Message-ID: <20230706054949.66556-6-tao1.su@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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tristone13th authored and bonzini committed Jul 7, 2023
1 parent 6c43ec3 commit 3baf7ae
Showing 1 changed file with 11 additions and 2 deletions.
13 changes: 11 additions & 2 deletions target/i386/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -3944,8 +3944,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
.model_id = "Intel Xeon Processor (SapphireRapids)",
.versions = (X86CPUVersionDefinition[]) {
{ .version = 1 },
{ /* end of list */ },
},
{
.version = 2,
.props = (PropValue[]) {
{ "sbdr-ssdp-no", "on" },
{ "fbsdp-no", "on" },
{ "psdp-no", "on" },
{ /* end of list */ }
}
},
{ /* end of list */ }
}
},
{
.name = "Denverton",
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