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NXP PCF8574 and compatible ICs are simple I2C GPIO expanders. PCF8574 incorporates quasi-bidirectional IO, and simple communication protocol, when IO read is I2C byte read, and IO write is I2C byte write. User can think of it as open-drain port, when line high state is input and line low state is output. Signed-off-by: Dmitrii Sharikhin <d.sharikhin@yadro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <f1552d822276e878d84c01eba2cf2c7c9ebdde00.camel@yadro.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@@ -19,3 +19,7 @@ config SIFIVE_GPIO | |
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config STM32L4X5_GPIO | ||
bool | ||
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config PCF8574 | ||
bool | ||
depends on I2C |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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/* | ||
* NXP PCF8574 8-port I2C GPIO expansion chip. | ||
* Copyright (c) 2024 KNS Group (YADRO). | ||
* Written by Dmitrii Sharikhin <d.sharikhin@yadro.com> | ||
*/ | ||
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#include "qemu/osdep.h" | ||
#include "hw/i2c/i2c.h" | ||
#include "hw/gpio/pcf8574.h" | ||
#include "hw/irq.h" | ||
#include "migration/vmstate.h" | ||
#include "qemu/log.h" | ||
#include "qemu/module.h" | ||
#include "qom/object.h" | ||
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/* | ||
* PCF8574 and compatible chips incorporate quasi-bidirectional | ||
* IO. Electrically it means that device sustain pull-up to line | ||
* unless IO port is configured as output _and_ driven low. | ||
* | ||
* IO access is implemented as simple I2C single-byte read | ||
* or write operation. So, to configure line to input user write 1 | ||
* to corresponding bit. To configure line to output and drive it low | ||
* user write 0 to corresponding bit. | ||
* | ||
* In essence, user can think of quasi-bidirectional IO as | ||
* open-drain line, except presence of builtin rising edge acceleration | ||
* embedded in PCF8574 IC | ||
* | ||
* PCF8574 has interrupt request line, which is being pulled down when | ||
* port line state differs from last read. Port read operation clears | ||
* state and INT line returns to high state via pullup. | ||
*/ | ||
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OBJECT_DECLARE_SIMPLE_TYPE(PCF8574State, PCF8574) | ||
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#define PORTS_COUNT (8) | ||
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struct PCF8574State { | ||
I2CSlave parent_obj; | ||
uint8_t lastrq; /* Last requested state. If changed - assert irq */ | ||
uint8_t input; /* external electrical line state */ | ||
uint8_t output; /* Pull-up (1) or drive low (0) on bit */ | ||
qemu_irq handler[PORTS_COUNT]; | ||
qemu_irq intrq; /* External irq request */ | ||
}; | ||
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static void pcf8574_reset(DeviceState *dev) | ||
{ | ||
PCF8574State *s = PCF8574(dev); | ||
s->lastrq = MAKE_64BIT_MASK(0, PORTS_COUNT); | ||
s->input = MAKE_64BIT_MASK(0, PORTS_COUNT); | ||
s->output = MAKE_64BIT_MASK(0, PORTS_COUNT); | ||
} | ||
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static inline uint8_t pcf8574_line_state(PCF8574State *s) | ||
{ | ||
/* we driving line low or external circuit does that */ | ||
return s->input & s->output; | ||
} | ||
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static uint8_t pcf8574_rx(I2CSlave *i2c) | ||
{ | ||
PCF8574State *s = PCF8574(i2c); | ||
uint8_t linestate = pcf8574_line_state(s); | ||
if (s->lastrq != linestate) { | ||
s->lastrq = linestate; | ||
if (s->intrq) { | ||
qemu_set_irq(s->intrq, 1); | ||
} | ||
} | ||
return linestate; | ||
} | ||
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static int pcf8574_tx(I2CSlave *i2c, uint8_t data) | ||
{ | ||
PCF8574State *s = PCF8574(i2c); | ||
uint8_t prev; | ||
uint8_t diff; | ||
uint8_t actual; | ||
int line = 0; | ||
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prev = pcf8574_line_state(s); | ||
s->output = data; | ||
actual = pcf8574_line_state(s); | ||
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for (diff = (actual ^ prev); diff; diff &= ~(1 << line)) { | ||
line = ctz32(diff); | ||
if (s->handler[line]) { | ||
qemu_set_irq(s->handler[line], (actual >> line) & 1); | ||
} | ||
} | ||
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if (s->intrq) { | ||
qemu_set_irq(s->intrq, actual == s->lastrq); | ||
} | ||
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return 0; | ||
} | ||
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static const VMStateDescription vmstate_pcf8574 = { | ||
.name = "pcf8574", | ||
.version_id = 0, | ||
.minimum_version_id = 0, | ||
.fields = (VMStateField[]) { | ||
VMSTATE_I2C_SLAVE(parent_obj, PCF8574State), | ||
VMSTATE_UINT8(lastrq, PCF8574State), | ||
VMSTATE_UINT8(input, PCF8574State), | ||
VMSTATE_UINT8(output, PCF8574State), | ||
VMSTATE_END_OF_LIST() | ||
} | ||
}; | ||
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static void pcf8574_gpio_set(void *opaque, int line, int level) | ||
{ | ||
PCF8574State *s = (PCF8574State *) opaque; | ||
assert(line >= 0 && line < ARRAY_SIZE(s->handler)); | ||
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if (level) { | ||
s->input |= (1 << line); | ||
} else { | ||
s->input &= ~(1 << line); | ||
} | ||
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if (pcf8574_line_state(s) != s->lastrq && s->intrq) { | ||
qemu_set_irq(s->intrq, 0); | ||
} | ||
} | ||
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static void pcf8574_realize(DeviceState *dev, Error **errp) | ||
{ | ||
PCF8574State *s = PCF8574(dev); | ||
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qdev_init_gpio_in(dev, pcf8574_gpio_set, ARRAY_SIZE(s->handler)); | ||
qdev_init_gpio_out(dev, s->handler, ARRAY_SIZE(s->handler)); | ||
qdev_init_gpio_out_named(dev, &s->intrq, "nINT", 1); | ||
} | ||
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static void pcf8574_class_init(ObjectClass *klass, void *data) | ||
{ | ||
DeviceClass *dc = DEVICE_CLASS(klass); | ||
I2CSlaveClass *k = I2C_SLAVE_CLASS(klass); | ||
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k->recv = pcf8574_rx; | ||
k->send = pcf8574_tx; | ||
dc->realize = pcf8574_realize; | ||
dc->reset = pcf8574_reset; | ||
dc->vmsd = &vmstate_pcf8574; | ||
} | ||
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static const TypeInfo pcf8574_infos[] = { | ||
{ | ||
.name = TYPE_PCF8574, | ||
.parent = TYPE_I2C_SLAVE, | ||
.instance_size = sizeof(PCF8574State), | ||
.class_init = pcf8574_class_init, | ||
} | ||
}; | ||
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DEFINE_TYPES(pcf8574_infos); |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
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/* | ||
* NXP PCF8574 8-port I2C GPIO expansion chip. | ||
* | ||
* Copyright (c) 2024 KNS Group (YADRO). | ||
* Written by Dmitrii Sharikhin <d.sharikhin@yadro.com> | ||
*/ | ||
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#ifndef _HW_GPIO_PCF8574 | ||
#define _HW_GPIO_PCF8574 | ||
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#define TYPE_PCF8574 "pcf8574" | ||
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#endif /* _HW_GPIO_PCF8574 */ |