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target/hppa: Pass d to do_sub_cond
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Hoist the resolution of d up one level above do_sub_cond.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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rth7680 committed Nov 7, 2023
1 parent a751eb3 commit 4fe9533
Showing 1 changed file with 47 additions and 26 deletions.
73 changes: 47 additions & 26 deletions target/hppa/translate.c
Original file line number Diff line number Diff line change
Expand Up @@ -446,12 +446,15 @@ static DisasCond cond_make_n(void)
};
}

static DisasCond cond_make_0_tmp(TCGCond c, TCGv_reg a0)
static DisasCond cond_make_tmp(TCGCond c, TCGv_reg a0, TCGv_reg a1)
{
assert (c != TCG_COND_NEVER && c != TCG_COND_ALWAYS);
return (DisasCond){
.c = c, .a0 = a0, .a1 = tcg_constant_reg(0)
};
return (DisasCond){ .c = c, .a0 = a0, .a1 = a1 };
}

static DisasCond cond_make_0_tmp(TCGCond c, TCGv_reg a0)
{
return cond_make_tmp(c, a0, tcg_constant_reg(0));
}

static DisasCond cond_make_0(TCGCond c, TCGv_reg a0)
Expand All @@ -463,15 +466,12 @@ static DisasCond cond_make_0(TCGCond c, TCGv_reg a0)

static DisasCond cond_make(TCGCond c, TCGv_reg a0, TCGv_reg a1)
{
DisasCond r = { .c = c };

assert (c != TCG_COND_NEVER && c != TCG_COND_ALWAYS);
r.a0 = tcg_temp_new();
tcg_gen_mov_reg(r.a0, a0);
r.a1 = tcg_temp_new();
tcg_gen_mov_reg(r.a1, a1);
TCGv_reg t0 = tcg_temp_new();
TCGv_reg t1 = tcg_temp_new();

return r;
tcg_gen_mov_reg(t0, a0);
tcg_gen_mov_reg(t1, a1);
return cond_make_tmp(c, t0, t1);
}

static void cond_free(DisasCond *cond)
Expand Down Expand Up @@ -923,36 +923,55 @@ static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d,
can use the inputs directly. This can allow other computation to be
deleted as unused. */

static DisasCond do_sub_cond(DisasContext *ctx, unsigned cf, TCGv_reg res,
TCGv_reg in1, TCGv_reg in2, TCGv_reg sv)
static DisasCond do_sub_cond(DisasContext *ctx, unsigned cf, bool d,
TCGv_reg res, TCGv_reg in1,
TCGv_reg in2, TCGv_reg sv)
{
DisasCond cond;
bool d = false;
TCGCond tc;
bool ext_uns;

switch (cf >> 1) {
case 1: /* = / <> */
cond = cond_make(TCG_COND_EQ, in1, in2);
tc = TCG_COND_EQ;
ext_uns = true;
break;
case 2: /* < / >= */
cond = cond_make(TCG_COND_LT, in1, in2);
tc = TCG_COND_LT;
ext_uns = false;
break;
case 3: /* <= / > */
cond = cond_make(TCG_COND_LE, in1, in2);
tc = TCG_COND_LE;
ext_uns = false;
break;
case 4: /* << / >>= */
cond = cond_make(TCG_COND_LTU, in1, in2);
tc = TCG_COND_LTU;
ext_uns = true;
break;
case 5: /* <<= / >> */
cond = cond_make(TCG_COND_LEU, in1, in2);
tc = TCG_COND_LEU;
ext_uns = true;
break;
default:
return do_cond(ctx, cf, d, res, NULL, sv);
}

if (cf & 1) {
cond.c = tcg_invert_cond(cond.c);
tc = tcg_invert_cond(tc);
}
if (cond_need_ext(ctx, d)) {
TCGv_reg t1 = tcg_temp_new();
TCGv_reg t2 = tcg_temp_new();

return cond;
if (ext_uns) {
tcg_gen_ext32u_reg(t1, in1);
tcg_gen_ext32u_reg(t2, in2);
} else {
tcg_gen_ext32s_reg(t1, in1);
tcg_gen_ext32s_reg(t2, in2);
}
return cond_make_tmp(tc, t1, t2);
}
return cond_make(tc, in1, in2);
}

/*
Expand Down Expand Up @@ -1280,7 +1299,7 @@ static void do_sub(DisasContext *ctx, unsigned rt, TCGv_reg in1,

/* Compute the condition. We cannot use the special case for borrow. */
if (!is_b) {
cond = do_sub_cond(ctx, cf, dest, in1, in2, sv);
cond = do_sub_cond(ctx, cf, d, dest, in1, in2, sv);
} else {
cond = do_cond(ctx, cf, d, dest, get_carry(ctx, d, cb, cb_msb), sv);
}
Expand Down Expand Up @@ -1334,6 +1353,7 @@ static void do_cmpclr(DisasContext *ctx, unsigned rt, TCGv_reg in1,
{
TCGv_reg dest, sv;
DisasCond cond;
bool d = false;

dest = tcg_temp_new();
tcg_gen_sub_reg(dest, in1, in2);
Expand All @@ -1345,7 +1365,7 @@ static void do_cmpclr(DisasContext *ctx, unsigned rt, TCGv_reg in1,
}

/* Form the condition for the compare. */
cond = do_sub_cond(ctx, cf, dest, in1, in2, sv);
cond = do_sub_cond(ctx, cf, d, dest, in1, in2, sv);

/* Clear. */
tcg_gen_movi_reg(dest, 0);
Expand Down Expand Up @@ -3049,6 +3069,7 @@ static bool do_cmpb(DisasContext *ctx, unsigned r, TCGv_reg in1,
{
TCGv_reg dest, in2, sv;
DisasCond cond;
bool d = false;

in2 = load_gpr(ctx, r);
dest = tcg_temp_new();
Expand All @@ -3060,7 +3081,7 @@ static bool do_cmpb(DisasContext *ctx, unsigned r, TCGv_reg in1,
sv = do_sub_sv(ctx, dest, in1, in2);
}

cond = do_sub_cond(ctx, c * 2 + f, dest, in1, in2, sv);
cond = do_sub_cond(ctx, c * 2 + f, d, dest, in1, in2, sv);
return do_cbranch(ctx, disp, n, &cond);
}

Expand Down

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