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target/i386: move cpu_ptr1 to DisasContext
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Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@cota @bonzini
cota authored and bonzini committed Oct 2, 2018
1 parent 2ee2646 commit 6387e83
Showing 1 changed file with 26 additions and 26 deletions.
52 changes: 26 additions & 26 deletions target/i386/translate.c
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Expand Up @@ -79,7 +79,6 @@ static TCGv cpu_seg_base[6];
static TCGv_i64 cpu_bndl[4];
static TCGv_i64 cpu_bndu[4];

static TCGv_ptr cpu_ptr1;
static TCGv_i32 cpu_tmp2_i32, cpu_tmp3_i32;
static TCGv_i64 cpu_tmp1_i64;

Expand Down Expand Up @@ -142,6 +141,7 @@ typedef struct DisasContext {
TCGv tmp0;
TCGv tmp4;
TCGv_ptr ptr0;
TCGv_ptr ptr1;

sigjmp_buf jmpbuf;
} DisasContext;
Expand Down Expand Up @@ -3473,8 +3473,8 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
}
tcg_gen_addi_ptr(s->ptr0, cpu_env, op2_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op1_offset);
sse_fn_epp(cpu_env, s->ptr0, cpu_ptr1);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op1_offset);
sse_fn_epp(cpu_env, s->ptr0, s->ptr1);
break;
case 0x050: /* movmskps */
rm = (modrm & 7) | REX_B(s);
Expand Down Expand Up @@ -3503,14 +3503,14 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
}
op1_offset = offsetof(CPUX86State,xmm_regs[reg]);
tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
switch(b >> 8) {
case 0x0:
gen_helper_cvtpi2ps(cpu_env, s->ptr0, cpu_ptr1);
gen_helper_cvtpi2ps(cpu_env, s->ptr0, s->ptr1);
break;
default:
case 0x1:
gen_helper_cvtpi2pd(cpu_env, s->ptr0, cpu_ptr1);
gen_helper_cvtpi2pd(cpu_env, s->ptr0, s->ptr1);
break;
}
break;
Expand Down Expand Up @@ -3548,19 +3548,19 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
}
op1_offset = offsetof(CPUX86State,fpregs[reg & 7].mmx);
tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
switch(b) {
case 0x02c:
gen_helper_cvttps2pi(cpu_env, s->ptr0, cpu_ptr1);
gen_helper_cvttps2pi(cpu_env, s->ptr0, s->ptr1);
break;
case 0x12c:
gen_helper_cvttpd2pi(cpu_env, s->ptr0, cpu_ptr1);
gen_helper_cvttpd2pi(cpu_env, s->ptr0, s->ptr1);
break;
case 0x02d:
gen_helper_cvtps2pi(cpu_env, s->ptr0, cpu_ptr1);
gen_helper_cvtps2pi(cpu_env, s->ptr0, s->ptr1);
break;
case 0x12d:
gen_helper_cvtpd2pi(cpu_env, s->ptr0, cpu_ptr1);
gen_helper_cvtpd2pi(cpu_env, s->ptr0, s->ptr1);
break;
}
break;
Expand Down Expand Up @@ -3749,8 +3749,8 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
}

tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
sse_fn_epp(cpu_env, s->ptr0, cpu_ptr1);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
sse_fn_epp(cpu_env, s->ptr0, s->ptr1);

if (b == 0x17) {
set_cc_op(s, CC_OP_EFLAGS);
Expand Down Expand Up @@ -4298,8 +4298,8 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
}

tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
sse_fn_eppi(cpu_env, s->ptr0, cpu_ptr1, tcg_const_i32(val));
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
sse_fn_eppi(cpu_env, s->ptr0, s->ptr1, tcg_const_i32(val));
break;

case 0x33a:
Expand Down Expand Up @@ -4421,17 +4421,17 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
goto illegal_op;
}
tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
sse_fn_epp(cpu_env, s->ptr0, cpu_ptr1);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
sse_fn_epp(cpu_env, s->ptr0, s->ptr1);
break;
case 0x70: /* pshufx insn */
case 0xc6: /* pshufx insn */
val = x86_ldub_code(env, s);
tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
/* XXX: introduce a new table? */
sse_fn_ppi = (SSEFunc_0_ppi)sse_fn_epp;
sse_fn_ppi(s->ptr0, cpu_ptr1, tcg_const_i32(val));
sse_fn_ppi(s->ptr0, s->ptr1, tcg_const_i32(val));
break;
case 0xc2:
/* compare insns */
Expand All @@ -4441,8 +4441,8 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
sse_fn_epp = sse_op_table4[val][b1];

tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
sse_fn_epp(cpu_env, s->ptr0, cpu_ptr1);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
sse_fn_epp(cpu_env, s->ptr0, s->ptr1);
break;
case 0xf7:
/* maskmov : we must prepare A0 */
Expand All @@ -4453,15 +4453,15 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
gen_add_A0_ds_seg(s);

tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
/* XXX: introduce a new table? */
sse_fn_eppt = (SSEFunc_0_eppt)sse_fn_epp;
sse_fn_eppt(cpu_env, s->ptr0, cpu_ptr1, s->A0);
sse_fn_eppt(cpu_env, s->ptr0, s->ptr1, s->A0);
break;
default:
tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
sse_fn_epp(cpu_env, s->ptr0, cpu_ptr1);
tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
sse_fn_epp(cpu_env, s->ptr0, s->ptr1);
break;
}
if (b == 0x2e || b == 0x2f) {
Expand Down Expand Up @@ -8488,7 +8488,7 @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
cpu_tmp3_i32 = tcg_temp_new_i32();
dc->tmp4 = tcg_temp_new();
dc->ptr0 = tcg_temp_new_ptr();
cpu_ptr1 = tcg_temp_new_ptr();
dc->ptr1 = tcg_temp_new_ptr();
dc->cc_srcT = tcg_temp_local_new();
}

Expand Down

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