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hw/a*: pass owner to memory_region_init* functions
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@bonzini
bonzini committed Jul 4, 2013
1 parent db10ca9 commit 64bde0f
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Showing 24 changed files with 88 additions and 68 deletions.
9 changes: 6 additions & 3 deletions hw/acpi/core.c
View file
Expand Up @@ -419,7 +419,8 @@ void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
MemoryRegion *parent)
{
ar->pm1.evt.update_sci = update_sci;
memory_region_init_io(&ar->pm1.evt.io, NULL, &acpi_pm_evt_ops, ar, "acpi-evt", 4);
memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent),
&acpi_pm_evt_ops, ar, "acpi-evt", 4);
memory_region_add_subregion(parent, 0, &ar->pm1.evt.io);
}

Expand Down Expand Up @@ -481,7 +482,8 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
{
ar->tmr.update_sci = update_sci;
ar->tmr.timer = qemu_new_timer_ns(vm_clock, acpi_pm_tmr_timer, ar);
memory_region_init_io(&ar->tmr.io, NULL, &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
memory_region_init_io(&ar->tmr.io, memory_region_owner(parent),
&acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
memory_region_add_subregion(parent, 8, &ar->tmr.io);
}

Expand Down Expand Up @@ -552,7 +554,8 @@ void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val)
ar->pm1.cnt.s4_val = s4_val;
ar->wakeup.notify = acpi_notify_wakeup;
qemu_register_wakeup_notifier(&ar->wakeup);
memory_region_init_io(&ar->pm1.cnt.io, NULL, &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent),
&acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);
}

Expand Down
10 changes: 5 additions & 5 deletions hw/acpi/ich9.c
View file
Expand Up @@ -205,7 +205,7 @@ static void pm_powerdown_req(Notifier *n, void *opaque)
void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
qemu_irq sci_irq)
{
memory_region_init(&pm->io, NULL, "ich9-pm", ICH9_PMIO_SIZE);
memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
memory_region_set_enabled(&pm->io, false);
memory_region_add_subregion(pci_address_space_io(lpc_pci),
0, &pm->io);
Expand All @@ -215,12 +215,12 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, 2);

acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
memory_region_init_io(&pm->io_gpe, NULL, &ich9_gpe_ops, pm, "apci-gpe0",
ICH9_PMIO_GPE0_LEN);
memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
"apci-gpe0", ICH9_PMIO_GPE0_LEN);
memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);

memory_region_init_io(&pm->io_smi, NULL, &ich9_smi_ops, pm, "apci-smi",
8);
memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
"apci-smi", 8);
memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);

pm->irq = sci_irq;
Expand Down
14 changes: 7 additions & 7 deletions hw/acpi/piix4.c
View file
Expand Up @@ -424,7 +424,7 @@ static int piix4_pm_initfn(PCIDevice *dev)
memory_region_add_subregion(pci_address_space_io(dev),
s->smb_io_base, &s->smb.io);

memory_region_init(&s->io, NULL, "piix4-pm", 64);
memory_region_init(&s->io, OBJECT(s), "piix4-pm", 64);
memory_region_set_enabled(&s->io, false);
memory_region_add_subregion(pci_address_space_io(dev),
0, &s->io);
Expand Down Expand Up @@ -671,19 +671,19 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
PCIBus *bus, PIIX4PMState *s)
{
memory_region_init_io(&s->io_gpe, NULL, &piix4_gpe_ops, s, "apci-gpe0",
GPE_LEN);
memory_region_init_io(&s->io_gpe, OBJECT(s), &piix4_gpe_ops, s,
"acpi-gpe0", GPE_LEN);
memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe);

memory_region_init_io(&s->io_pci, NULL, &piix4_pci_ops, s, "apci-pci-hotplug",
PCI_HOTPLUG_SIZE);
memory_region_init_io(&s->io_pci, OBJECT(s), &piix4_pci_ops, s,
"acpi-pci-hotplug", PCI_HOTPLUG_SIZE);
memory_region_add_subregion(parent, PCI_HOTPLUG_ADDR,
&s->io_pci);
pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);

qemu_for_each_cpu(piix4_init_cpu_status, &s->gpe_cpu);
memory_region_init_io(&s->io_cpu, NULL, &cpu_hotplug_ops, s, "apci-cpu-hotplug",
PIIX4_PROC_LEN);
memory_region_init_io(&s->io_cpu, OBJECT(s), &cpu_hotplug_ops, s,
"acpi-cpu-hotplug", PIIX4_PROC_LEN);
memory_region_add_subregion(parent, PIIX4_PROC_BASE, &s->io_cpu);
s->cpu_added_notifier.notify = piix4_cpu_added_req;
qemu_register_cpu_added_notifier(&s->cpu_added_notifier);
Expand Down
21 changes: 12 additions & 9 deletions hw/alpha/typhoon.c
View file
Expand Up @@ -741,7 +741,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,

/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
but the address space hole reserved at this point is 8TB. */
memory_region_init_ram(&s->ram_region, NULL, "ram", ram_size);
memory_region_init_ram(&s->ram_region, OBJECT(s), "ram", ram_size);
vmstate_register_ram_global(&s->ram_region);
memory_region_add_subregion(addr_space, 0, &s->ram_region);

Expand All @@ -750,31 +750,34 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
the flash ROM. I'm not sure that we need to implement it at all. */

/* Pchip0 CSRs, 0x801.8000.0000, 256MB. */
memory_region_init_io(&s->pchip.region, NULL, &pchip_ops, s, "pchip0", 256*MB);
memory_region_init_io(&s->pchip.region, OBJECT(s), &pchip_ops, s, "pchip0",
256*MB);
memory_region_add_subregion(addr_space, 0x80180000000ULL,
&s->pchip.region);

/* Cchip CSRs, 0x801.A000.0000, 256MB. */
memory_region_init_io(&s->cchip.region, NULL, &cchip_ops, s, "cchip0", 256*MB);
memory_region_init_io(&s->cchip.region, OBJECT(s), &cchip_ops, s, "cchip0",
256*MB);
memory_region_add_subregion(addr_space, 0x801a0000000ULL,
&s->cchip.region);

/* Dchip CSRs, 0x801.B000.0000, 256MB. */
memory_region_init_io(&s->dchip_region, NULL, &dchip_ops, s, "dchip0", 256*MB);
memory_region_init_io(&s->dchip_region, OBJECT(s), &dchip_ops, s, "dchip0",
256*MB);
memory_region_add_subregion(addr_space, 0x801b0000000ULL,
&s->dchip_region);

/* Pchip0 PCI memory, 0x800.0000.0000, 4GB. */
memory_region_init(&s->pchip.reg_mem, NULL, "pci0-mem", 4*GB);
memory_region_init(&s->pchip.reg_mem, OBJECT(s), "pci0-mem", 4*GB);
memory_region_add_subregion(addr_space, 0x80000000000ULL,
&s->pchip.reg_mem);

/* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB. */
/* ??? Ideally we drop the "system" i/o space on the floor and give the
PCI subsystem the full address space reserved by the chipset.
We can't do that until the MEM and IO paths in memory.c are unified. */
memory_region_init_io(&s->pchip.reg_io, NULL, &alpha_pci_bw_io_ops, NULL,
"pci0-io", 32*MB);
memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_bw_io_ops,
NULL, "pci0-io", 32*MB);
memory_region_add_subregion(addr_space, 0x801fc000000ULL,
&s->pchip.reg_io);

Expand All @@ -784,13 +787,13 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
phb->bus = b;

/* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */
memory_region_init_io(&s->pchip.reg_iack, NULL, &alpha_pci_iack_ops, b,
memory_region_init_io(&s->pchip.reg_iack, OBJECT(s), &alpha_pci_iack_ops, b,
"pci0-iack", 64*MB);
memory_region_add_subregion(addr_space, 0x801f8000000ULL,
&s->pchip.reg_iack);

/* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */
memory_region_init_io(&s->pchip.reg_conf, NULL, &alpha_pci_conf1_ops, b,
memory_region_init_io(&s->pchip.reg_conf, OBJECT(s), &alpha_pci_conf1_ops, b,
"pci0-conf", 16*MB);
memory_region_add_subregion(addr_space, 0x801fe000000ULL,
&s->pchip.reg_conf);
Expand Down
4 changes: 2 additions & 2 deletions hw/arm/armv7m.c
View file
Expand Up @@ -124,8 +124,8 @@ static int bitband_init(SysBusDevice *dev)
{
BitBandState *s = FROM_SYSBUS(BitBandState, dev);

memory_region_init_io(&s->iomem, NULL, &bitband_ops, &s->base, "bitband",
0x02000000);
memory_region_init_io(&s->iomem, OBJECT(s), &bitband_ops, &s->base,
"bitband", 0x02000000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
Expand Down
4 changes: 2 additions & 2 deletions hw/arm/highbank.c
View file
Expand Up @@ -149,8 +149,8 @@ static int highbank_regs_init(SysBusDevice *dev)
HighbankRegsState *s = FROM_SYSBUS(HighbankRegsState, dev);

s->iomem = g_new(MemoryRegion, 1);
memory_region_init_io(s->iomem, NULL, &hb_mem_ops, s->regs, "highbank_regs",
0x1000);
memory_region_init_io(s->iomem, OBJECT(s), &hb_mem_ops, s->regs,
"highbank_regs", 0x1000);
sysbus_init_mmio(dev, s->iomem);

return 0;
Expand Down
7 changes: 4 additions & 3 deletions hw/arm/integratorcp.c
View file
Expand Up @@ -249,10 +249,10 @@ static int integratorcm_init(SysBusDevice *dev)
}
memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
s->cm_init = 0x00000112;
memory_region_init_ram(&s->flash, NULL, "integrator.flash", 0x100000);
memory_region_init_ram(&s->flash, OBJECT(s), "integrator.flash", 0x100000);
vmstate_register_ram_global(&s->flash);

memory_region_init_io(&s->iomem, NULL, &integratorcm_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &integratorcm_ops, s,
"integratorcm", 0x00800000);
sysbus_init_mmio(dev, &s->iomem);

Expand Down Expand Up @@ -374,7 +374,8 @@ static int icp_pic_init(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, icp_pic_set_irq, 32);
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_fiq);
memory_region_init_io(&s->iomem, NULL, &icp_pic_ops, s, "icp-pic", 0x00800000);
memory_region_init_io(&s->iomem, OBJECT(s), &icp_pic_ops, s,
"icp-pic", 0x00800000);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
Expand Down
20 changes: 10 additions & 10 deletions hw/arm/musicpal.c
View file
Expand Up @@ -389,8 +389,8 @@ static int mv88w8618_eth_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
s->nic = qemu_new_nic(&net_mv88w8618_info, &s->conf,
object_get_typename(OBJECT(dev)), dev->qdev.id, s);
memory_region_init_io(&s->iomem, NULL, &mv88w8618_eth_ops, s, "mv88w8618-eth",
MP_ETH_SIZE);
memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_eth_ops, s,
"mv88w8618-eth", MP_ETH_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
}
Expand Down Expand Up @@ -612,7 +612,7 @@ static int musicpal_lcd_init(SysBusDevice *dev)

s->brightness = 7;

memory_region_init_io(&s->iomem, NULL, &musicpal_lcd_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_lcd_ops, s,
"musicpal-lcd", MP_LCD_SIZE);
sysbus_init_mmio(dev, &s->iomem);

Expand Down Expand Up @@ -740,7 +740,7 @@ static int mv88w8618_pic_init(SysBusDevice *dev)

qdev_init_gpio_in(&dev->qdev, mv88w8618_pic_set_irq, 32);
sysbus_init_irq(dev, &s->parent_irq);
memory_region_init_io(&s->iomem, NULL, &mv88w8618_pic_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_pic_ops, s,
"musicpal-pic", MP_PIC_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
Expand Down Expand Up @@ -905,7 +905,7 @@ static int mv88w8618_pit_init(SysBusDevice *dev)
mv88w8618_timer_init(dev, &s->timer[i], 1000000);
}

memory_region_init_io(&s->iomem, NULL, &mv88w8618_pit_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_pit_ops, s,
"musicpal-pit", MP_PIT_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
Expand Down Expand Up @@ -999,7 +999,7 @@ static int mv88w8618_flashcfg_init(SysBusDevice *dev)
mv88w8618_flashcfg_state *s = FROM_SYSBUS(mv88w8618_flashcfg_state, dev);

s->cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */
memory_region_init_io(&s->iomem, NULL, &mv88w8618_flashcfg_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_flashcfg_ops, s,
"musicpal-flashcfg", MP_FLASHCFG_SIZE);
sysbus_init_mmio(dev, &s->iomem);
return 0;
Expand Down Expand Up @@ -1074,7 +1074,7 @@ static void musicpal_misc_init(Object *obj)
SysBusDevice *sd = SYS_BUS_DEVICE(obj);
MusicPalMiscState *s = MUSICPAL_MISC(obj);

memory_region_init_io(&s->iomem, NULL, &musicpal_misc_ops, NULL,
memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_misc_ops, NULL,
"musicpal-misc", MP_MISC_SIZE);
sysbus_init_mmio(sd, &s->iomem);
}
Expand Down Expand Up @@ -1121,7 +1121,7 @@ static int mv88w8618_wlan_init(SysBusDevice *dev)
{
MemoryRegion *iomem = g_new(MemoryRegion, 1);

memory_region_init_io(iomem, NULL, &mv88w8618_wlan_ops, NULL,
memory_region_init_io(iomem, OBJECT(dev), &mv88w8618_wlan_ops, NULL,
"musicpal-wlan", MP_WLAN_SIZE);
sysbus_init_mmio(dev, iomem);
return 0;
Expand Down Expand Up @@ -1327,7 +1327,7 @@ static int musicpal_gpio_init(SysBusDevice *dev)

sysbus_init_irq(dev, &s->irq);

memory_region_init_io(&s->iomem, NULL, &musicpal_gpio_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_gpio_ops, s,
"musicpal-gpio", MP_GPIO_SIZE);
sysbus_init_mmio(dev, &s->iomem);

Expand Down Expand Up @@ -1484,7 +1484,7 @@ static int musicpal_key_init(SysBusDevice *dev)
{
musicpal_key_state *s = FROM_SYSBUS(musicpal_key_state, dev);

memory_region_init(&s->iomem, NULL, "dummy", 0);
memory_region_init(&s->iomem, OBJECT(s), "dummy", 0);
sysbus_init_mmio(dev, &s->iomem);

s->kbd_extended = 0;
Expand Down
10 changes: 6 additions & 4 deletions hw/arm/pxa2xx.c
View file
Expand Up @@ -764,7 +764,8 @@ static int pxa2xx_ssp_init(SysBusDevice *dev)

sysbus_init_irq(dev, &s->irq);

memory_region_init_io(&s->iomem, NULL, &pxa2xx_ssp_ops, s, "pxa2xx-ssp", 0x1000);
memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_ssp_ops, s,
"pxa2xx-ssp", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
register_savevm(&dev->qdev, "pxa2xx_ssp", -1, 0,
pxa2xx_ssp_save, pxa2xx_ssp_load, s);
Expand Down Expand Up @@ -1131,7 +1132,8 @@ static int pxa2xx_rtc_init(SysBusDevice *dev)

sysbus_init_irq(dev, &s->rtc_irq);

memory_region_init_io(&s->iomem, NULL, &pxa2xx_rtc_ops, s, "pxa2xx-rtc", 0x10000);
memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_rtc_ops, s,
"pxa2xx-rtc", 0x10000);
sysbus_init_mmio(dev, &s->iomem);

return 0;
Expand Down Expand Up @@ -1481,8 +1483,8 @@ static int pxa2xx_i2c_initfn(SysBusDevice *dev)

s->bus = i2c_init_bus(&dev->qdev, "i2c");

memory_region_init_io(&s->iomem, NULL, &pxa2xx_i2c_ops, s,
"pxa2xx-i2x", s->region_size);
memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_i2c_ops, s,
"pxa2xx-i2c", s->region_size);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);

Expand Down
2 changes: 1 addition & 1 deletion hw/arm/pxa2xx_gpio.c
View file
Expand Up @@ -283,7 +283,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev)
qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines);
qdev_init_gpio_out(&dev->qdev, s->handler, s->lines);

memory_region_init_io(&s->iomem, NULL, &pxa_gpio_ops, s, "pxa2xx-gpio", 0x1000);
memory_region_init_io(&s->iomem, OBJECT(s), &pxa_gpio_ops, s, "pxa2xx-gpio", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq0);
sysbus_init_irq(dev, &s->irq1);
Expand Down
2 changes: 1 addition & 1 deletion hw/arm/pxa2xx_pic.c
View file
Expand Up @@ -278,7 +278,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
qdev_init_gpio_in(dev, pxa2xx_pic_set_irq, PXA2XX_PIC_SRCS);

/* Enable IC memory-mapped registers access. */
memory_region_init_io(&s->iomem, NULL, &pxa2xx_pic_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &pxa2xx_pic_ops, s,
"pxa2xx-pic", 0x00100000);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
Expand Down
2 changes: 1 addition & 1 deletion hw/arm/spitz.c
View file
Expand Up @@ -169,7 +169,7 @@ static int sl_nand_init(SysBusDevice *dev) {
nand = drive_get(IF_MTD, 0, 0);
s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);

memory_region_init_io(&s->iomem, NULL, &sl_ops, s, "sl", 0x40);
memory_region_init_io(&s->iomem, OBJECT(s), &sl_ops, s, "sl", 0x40);
sysbus_init_mmio(dev, &s->iomem);

return 0;
Expand Down
6 changes: 3 additions & 3 deletions hw/arm/stellaris.c
View file
Expand Up @@ -307,7 +307,7 @@ static int stellaris_gptm_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_out(&dev->qdev, &s->trigger, 1);

memory_region_init_io(&s->iomem, NULL, &gptm_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &gptm_ops, s,
"gptm", 0x1000);
sysbus_init_mmio(dev, &s->iomem);

Expand Down Expand Up @@ -862,7 +862,7 @@ static int stellaris_i2c_init(SysBusDevice * dev)
bus = i2c_init_bus(&dev->qdev, "i2c");
s->bus = bus;

memory_region_init_io(&s->iomem, NULL, &stellaris_i2c_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &stellaris_i2c_ops, s,
"i2c", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
/* ??? For now we only implement the master interface. */
Expand Down Expand Up @@ -1145,7 +1145,7 @@ static int stellaris_adc_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq[n]);
}

memory_region_init_io(&s->iomem, NULL, &stellaris_adc_ops, s,
memory_region_init_io(&s->iomem, OBJECT(s), &stellaris_adc_ops, s,
"adc", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
stellaris_adc_reset(s);
Expand Down

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