Skip to content

Commit

Permalink
target-sparc: Pass TCGMemOp constants to helper_ld/st_asi
Browse files Browse the repository at this point in the history 
Reduces the argument count for helper_ld_asi; do helper_st_asi
for consistency.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
  • Loading branch information
@rth7680
rth7680 committed Jul 12, 2016
1 parent c095b83 commit 6850811
Show file tree
Hide file tree
Showing 3 changed files with 69 additions and 66 deletions.
4 changes: 2 additions & 2 deletions target-sparc/helper.h
View file
Expand Up @@ -48,8 +48,8 @@ DEF_HELPER_FLAGS_3(udivx, TCG_CALL_NO_WG, i64, env, i64, i64)
DEF_HELPER_FLAGS_3(ldqf, TCG_CALL_NO_WG, void, env, tl, int)
DEF_HELPER_FLAGS_3(stqf, TCG_CALL_NO_WG, void, env, tl, int)
#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
DEF_HELPER_FLAGS_5(ld_asi, TCG_CALL_NO_WG, i64, env, tl, int, int, int)
DEF_HELPER_FLAGS_5(st_asi, TCG_CALL_NO_WG, void, env, tl, i64, int, int)
DEF_HELPER_FLAGS_4(ld_asi, TCG_CALL_NO_WG, i64, env, tl, int, i32)
DEF_HELPER_FLAGS_5(st_asi, TCG_CALL_NO_WG, void, env, tl, i64, int, i32)
#endif
DEF_HELPER_2(ldfsr, void, env, i32)
DEF_HELPER_FLAGS_1(fabss, TCG_CALL_NO_RWG_SE, f32, f32)
Expand Down
73 changes: 42 additions & 31 deletions target-sparc/ldst_helper.c
View file
Expand Up @@ -19,6 +19,7 @@

#include "qemu/osdep.h"
#include "cpu.h"
#include "tcg.h"
#include "exec/helper-proto.h"
#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
Expand Down Expand Up @@ -428,9 +429,11 @@ static uint64_t leon3_cache_control_ld(CPUSPARCState *env, target_ulong addr,
return ret;
}

uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
int sign)
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
int sign = memop & MO_SIGN;
CPUState *cs = CPU(sparc_env_get_cpu(env));
uint64_t ret = 0;
#if defined(DEBUG_MXCC) || defined(DEBUG_ASI)
Expand Down Expand Up @@ -698,9 +701,10 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
return ret;
}

void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
int size)
void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
SPARCCPU *cpu = sparc_env_get_cpu(env);
CPUState *cs = CPU(cpu);

Expand Down Expand Up @@ -1097,9 +1101,11 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
#else /* TARGET_SPARC64 */

#ifdef CONFIG_USER_ONLY
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
int sign)
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
int sign = memop & MO_SIGN;
uint64_t ret = 0;
#if defined(DEBUG_ASI)
target_ulong last_addr = addr;
Expand Down Expand Up @@ -1205,8 +1211,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}

void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
int asi, int size)
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
#ifdef DEBUG_ASI
dump_asi("write", addr, asi, size, val);
#endif
Expand Down Expand Up @@ -1276,9 +1283,11 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,

#else /* CONFIG_USER_ONLY */

uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
int sign)
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
int sign = memop & MO_SIGN;
CPUState *cs = CPU(sparc_env_get_cpu(env));
uint64_t ret = 0;
#if defined(DEBUG_ASI)
Expand Down Expand Up @@ -1658,8 +1667,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}

void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
int asi, int size)
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
SPARCCPU *cpu = sparc_env_get_cpu(env);
CPUState *cs = CPU(cpu);

Expand Down Expand Up @@ -2138,8 +2148,8 @@ void helper_ldda_asi(CPUSPARCState *env, target_ulong addr, int asi)
a single 64-bit load. However, LE asis *are* treated
as two 32-bit loads individually byte swapped. */
helper_check_align(env, addr, 0x7);
QT0.high = (uint32_t)helper_ld_asi(env, addr, asi, 4, 0);
QT0.low = (uint32_t)helper_ld_asi(env, addr + 4, asi, 4, 0);
QT0.high = (uint32_t)helper_ld_asi(env, addr, asi, MO_UL);
QT0.low = (uint32_t)helper_ld_asi(env, addr + 4, asi, MO_UL);
return;
}

Expand Down Expand Up @@ -2171,7 +2181,7 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
helper_check_align(env, addr, 0x3f);
for (i = 0; i < 8; i++, rd += 2, addr += 8) {
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x8f, 8, 0);
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x8f, MO_Q);
}
return;

Expand All @@ -2189,7 +2199,7 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
helper_check_align(env, addr, 0x3f);
for (i = 0; i < 8; i++, rd += 2, addr += 8) {
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x19, 8, 0);
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x19, MO_Q);
}
return;

Expand All @@ -2200,19 +2210,19 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
switch (size) {
default:
case 4:
val = helper_ld_asi(env, addr, asi, size, 0);
val = helper_ld_asi(env, addr, asi, MO_UL);
if (rd & 1) {
env->fpr[rd / 2].l.lower = val;
} else {
env->fpr[rd / 2].l.upper = val;
}
break;
case 8:
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, size, 0);
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, MO_Q);
break;
case 16:
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, 8, 0);
env->fpr[rd / 2 + 1].ll = helper_ld_asi(env, addr + 8, asi, 8, 0);
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, MO_Q);
env->fpr[rd / 2 + 1].ll = helper_ld_asi(env, addr + 8, asi, MO_Q);
break;
}
}
Expand All @@ -2238,7 +2248,7 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
helper_check_align(env, addr, 0x3f);
for (i = 0; i < 8; i++, rd += 2, addr += 8) {
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x8f, 8);
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x8f, MO_Q);
}

return;
Expand All @@ -2256,22 +2266,23 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
helper_check_align(env, addr, 0x3f);
for (i = 0; i < 8; i++, rd += 2, addr += 8) {
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x19, 8);
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x19, MO_Q);
}

return;
case ASI_FL16_P: /* 16-bit floating point load primary */
case ASI_FL16_S: /* 16-bit floating point load secondary */
case ASI_FL16_PL: /* 16-bit floating point load primary, LE */
case ASI_FL16_SL: /* 16-bit floating point load secondary, LE */
helper_check_align(env, addr, 1);
/* Fall through */
val = env->fpr[rd / 2].l.lower;
helper_st_asi(env, addr, val, asi & 0x8d, MO_UW);
return;
case ASI_FL8_P: /* 8-bit floating point load primary */
case ASI_FL8_S: /* 8-bit floating point load secondary */
case ASI_FL8_PL: /* 8-bit floating point load primary, LE */
case ASI_FL8_SL: /* 8-bit floating point load secondary, LE */
val = env->fpr[rd / 2].l.lower;
helper_st_asi(env, addr, val, asi & 0x8d, ((asi & 2) >> 1) + 1);
helper_st_asi(env, addr, val, asi & 0x8d, MO_UB);
return;
default:
helper_check_align(env, addr, 3);
Expand All @@ -2286,14 +2297,14 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
} else {
val = env->fpr[rd / 2].l.upper;
}
helper_st_asi(env, addr, val, asi, size);
helper_st_asi(env, addr, val, asi, MO_UL);
break;
case 8:
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, size);
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, MO_Q);
break;
case 16:
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, 8);
helper_st_asi(env, addr + 8, env->fpr[rd / 2 + 1].ll, asi, 8);
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, MO_Q);
helper_st_asi(env, addr + 8, env->fpr[rd / 2 + 1].ll, asi, MO_Q);
break;
}
}
Expand All @@ -2304,9 +2315,9 @@ target_ulong helper_casx_asi(CPUSPARCState *env, target_ulong addr,
{
target_ulong ret;

ret = helper_ld_asi(env, addr, asi, 8, 0);
ret = helper_ld_asi(env, addr, asi, MO_Q);
if (val2 == ret) {
helper_st_asi(env, addr, val1, asi, 8);
helper_st_asi(env, addr, val1, asi, MO_Q);
}
return ret;
}
Expand All @@ -2319,10 +2330,10 @@ target_ulong helper_cas_asi(CPUSPARCState *env, target_ulong addr,
target_ulong ret;

val2 &= 0xffffffffUL;
ret = helper_ld_asi(env, addr, asi, 4, 0);
ret = helper_ld_asi(env, addr, asi, MO_UL);
ret &= 0xffffffffUL;
if (val2 == ret) {
helper_st_asi(env, addr, val1 & 0xffffffffUL, asi, 4);
helper_st_asi(env, addr, val1 & 0xffffffffUL, asi, MO_UL);
}
return ret;
}
Expand Down
58 changes: 25 additions & 33 deletions target-sparc/translate.c
View file
Expand Up @@ -2133,22 +2133,20 @@ static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr,
default:
{
TCGv_i32 r_asi = tcg_const_i32(da.asi);
TCGv_i32 r_size = tcg_const_i32(1 << (memop & MO_SIZE));
TCGv_i32 r_sign = tcg_const_i32(!!(memop & MO_SIGN));
TCGv_i32 r_mop = tcg_const_i32(memop);

save_state(dc);
#ifdef TARGET_SPARC64
gen_helper_ld_asi(dst, cpu_env, addr, r_asi, r_size, r_sign);
gen_helper_ld_asi(dst, cpu_env, addr, r_asi, r_mop);
#else
{
TCGv_i64 t64 = tcg_temp_new_i64();
gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign);
gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop);
tcg_gen_trunc_i64_tl(dst, t64);
tcg_temp_free_i64(t64);
}
#endif
tcg_temp_free_i32(r_sign);
tcg_temp_free_i32(r_size);
tcg_temp_free_i32(r_mop);
tcg_temp_free_i32(r_asi);
}
break;
Expand All @@ -2173,20 +2171,20 @@ static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr,
default:
{
TCGv_i32 r_asi = tcg_const_i32(da.asi);
TCGv_i32 r_size = tcg_const_i32(1 << (memop & MO_SIZE));
TCGv_i32 r_mop = tcg_const_i32(memop & MO_SIZE);

save_state(dc);
#ifdef TARGET_SPARC64
gen_helper_st_asi(cpu_env, addr, src, r_asi, r_size);
gen_helper_st_asi(cpu_env, addr, src, r_asi, r_mop);
#else
{
TCGv_i64 t64 = tcg_temp_new_i64();
tcg_gen_extu_tl_i64(t64, src);
gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size);
gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_mop);
tcg_temp_free_i64(t64);
}
#endif
tcg_temp_free_i32(r_size);
tcg_temp_free_i32(r_mop);
tcg_temp_free_i32(r_asi);

/* A write to a TLB register may alter page maps. End the TB. */
Expand All @@ -2207,20 +2205,18 @@ static void gen_swap_asi(DisasContext *dc, TCGv dst, TCGv src,
default:
{
TCGv_i32 r_asi = tcg_const_i32(da.asi);
TCGv_i32 r_size = tcg_const_i32(4);
TCGv_i32 r_sign = tcg_const_i32(0);
TCGv_i32 r_mop = tcg_const_i32(MO_UL);
TCGv_i64 s64, t64;

save_state(dc);
t64 = tcg_temp_new_i64();
gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign);
tcg_temp_free_i32(r_sign);
gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop);

s64 = tcg_temp_new_i64();
tcg_gen_extu_tl_i64(s64, src);
gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_size);
gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_mop);
tcg_temp_free_i64(s64);
tcg_temp_free_i32(r_size);
tcg_temp_free_i32(r_mop);
tcg_temp_free_i32(r_asi);

tcg_gen_trunc_i64_tl(dst, t64);
Expand Down Expand Up @@ -2260,19 +2256,17 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn)
default:
{
TCGv_i32 r_asi = tcg_const_i32(da.asi);
TCGv_i32 r_size = tcg_const_i32(1);
TCGv_i32 r_sign = tcg_const_i32(0);
TCGv_i32 r_mop = tcg_const_i32(MO_UB);
TCGv_i64 s64, t64;

save_state(dc);
t64 = tcg_temp_new_i64();
gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign);
tcg_temp_free_i32(r_sign);
gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop);

s64 = tcg_const_i64(0xff);
gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_size);
gen_helper_st_asi(cpu_env, addr, s64, r_asi, r_mop);
tcg_temp_free_i64(s64);
tcg_temp_free_i32(r_size);
tcg_temp_free_i32(r_mop);
tcg_temp_free_i32(r_asi);

tcg_gen_trunc_i64_tl(dst, t64);
Expand Down Expand Up @@ -2426,15 +2420,15 @@ static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
default:
{
TCGv_i32 r_asi = tcg_const_i32(da.asi);
TCGv_i32 r_size = tcg_const_i32(8);
TCGv_i32 r_mop = tcg_const_i32(MO_Q);
TCGv_i64 t64;

save_state(dc);

t64 = tcg_temp_new_i64();
tcg_gen_concat_tl_i64(t64, lo, hi);
gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size);
tcg_temp_free_i32(r_size);
gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_mop);
tcg_temp_free_i32(r_mop);
tcg_temp_free_i32(r_asi);
tcg_temp_free_i64(t64);
}
Expand Down Expand Up @@ -2484,13 +2478,11 @@ static void gen_ldda_asi(DisasContext *dc, TCGv addr, int insn, int rd)
default:
{
TCGv_i32 r_asi = tcg_const_i32(da.asi);
TCGv_i32 r_size = tcg_const_i32(8);
TCGv_i32 r_sign = tcg_const_i32(0);
TCGv_i32 r_mop = tcg_const_i32(MO_Q);

save_state(dc);
gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign);
tcg_temp_free_i32(r_sign);
tcg_temp_free_i32(r_size);
gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_mop);
tcg_temp_free_i32(r_mop);
tcg_temp_free_i32(r_asi);
}
break;
Expand Down Expand Up @@ -2521,11 +2513,11 @@ static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
default:
{
TCGv_i32 r_asi = tcg_const_i32(da.asi);
TCGv_i32 r_size = tcg_const_i32(8);
TCGv_i32 r_mop = tcg_const_i32(MO_Q);

save_state(dc);
gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size);
tcg_temp_free_i32(r_size);
gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_mop);
tcg_temp_free_i32(r_mop);
tcg_temp_free_i32(r_asi);
}
break;
Expand Down

0 comments on commit 6850811

Please sign in to comment.